Intel(R) Threading Building Blocks Doxygen Documentation version 4.2.3
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gcc_generic.h
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1/*
2 Copyright (c) 2005-2020 Intel Corporation
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#if !defined(__TBB_machine_H) || defined(__TBB_machine_gcc_generic_H)
18#error Do not #include this internal file directly; use public TBB headers instead.
19#endif
20
21#define __TBB_machine_gcc_generic_H
22
23#include <stdint.h>
24#include <unistd.h>
25
26#define __TBB_WORDSIZE __SIZEOF_POINTER__
27
28#if __TBB_GCC_64BIT_ATOMIC_BUILTINS_BROKEN
29 #define __TBB_64BIT_ATOMICS 0
30#endif
31
33#if __ANDROID__ && __TBB_generic_arch
34 #define __TBB_CPU_CTL_ENV_PRESENT 0
35#endif
36
37// __BYTE_ORDER__ is used in accordance with http://gcc.gnu.org/onlinedocs/cpp/Common-Predefined-Macros.html,
38// but __BIG_ENDIAN__ or __LITTLE_ENDIAN__ may be more commonly found instead.
39#if __BIG_ENDIAN__ || (defined(__BYTE_ORDER__) && __BYTE_ORDER__==__ORDER_BIG_ENDIAN__)
40 #define __TBB_ENDIANNESS __TBB_ENDIAN_BIG
41#elif __LITTLE_ENDIAN__ || (defined(__BYTE_ORDER__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__)
42 #define __TBB_ENDIANNESS __TBB_ENDIAN_LITTLE
43#elif defined(__BYTE_ORDER__)
44 #define __TBB_ENDIANNESS __TBB_ENDIAN_UNSUPPORTED
45#else
46 #define __TBB_ENDIANNESS __TBB_ENDIAN_DETECT
47#endif
48
49#if __TBB_GCC_VERSION < 40700
50// Use __sync_* builtins
51
57#define __TBB_acquire_consistency_helper() __sync_synchronize()
58#define __TBB_release_consistency_helper() __sync_synchronize()
59#define __TBB_full_memory_fence() __sync_synchronize()
60#define __TBB_control_consistency_helper() __sync_synchronize()
61
62#define __TBB_MACHINE_DEFINE_ATOMICS(S,T) \
63inline T __TBB_machine_cmpswp##S( volatile void *ptr, T value, T comparand ) { \
64 return __sync_val_compare_and_swap(reinterpret_cast<volatile T *>(ptr),comparand,value); \
65} \
66inline T __TBB_machine_fetchadd##S( volatile void *ptr, T value ) { \
67 return __sync_fetch_and_add(reinterpret_cast<volatile T *>(ptr),value); \
68}
69
70#define __TBB_USE_GENERIC_FETCH_STORE 1
71
72#else
73// __TBB_GCC_VERSION >= 40700; use __atomic_* builtins available since gcc 4.7
74
75#define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
76// Acquire and release fence intrinsics in GCC might miss compiler fence.
77// Adding it at both sides of an intrinsic, as we do not know what reordering can be made.
78#define __TBB_acquire_consistency_helper() __TBB_compiler_fence(); __atomic_thread_fence(__ATOMIC_ACQUIRE); __TBB_compiler_fence()
79#define __TBB_release_consistency_helper() __TBB_compiler_fence(); __atomic_thread_fence(__ATOMIC_RELEASE); __TBB_compiler_fence()
80#define __TBB_full_memory_fence() __atomic_thread_fence(__ATOMIC_SEQ_CST)
81#define __TBB_control_consistency_helper() __TBB_acquire_consistency_helper()
82
83#define __TBB_MACHINE_DEFINE_ATOMICS(S,T) \
84inline T __TBB_machine_cmpswp##S( volatile void *ptr, T value, T comparand ) { \
85 (void)__atomic_compare_exchange_n(reinterpret_cast<volatile T *>(ptr), &comparand, value, \
86 false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); \
87 return comparand; \
88} \
89inline T __TBB_machine_fetchadd##S( volatile void *ptr, T value ) { \
90 return __atomic_fetch_add(reinterpret_cast<volatile T *>(ptr), value, __ATOMIC_SEQ_CST); \
91} \
92inline T __TBB_machine_fetchstore##S( volatile void *ptr, T value ) { \
93 return __atomic_exchange_n(reinterpret_cast<volatile T *>(ptr), value, __ATOMIC_SEQ_CST); \
94}
95
96#endif // __TBB_GCC_VERSION < 40700
97
102
103#undef __TBB_MACHINE_DEFINE_ATOMICS
104
105typedef unsigned char __TBB_Flag;
107
108#if __TBB_GCC_VERSION < 40700
109// Use __sync_* builtins
110
111// Use generic machine_load_store functions if there are no builtin atomics
112#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
113#define __TBB_USE_GENERIC_RELAXED_LOAD_STORE 1
114#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
115
116static inline void __TBB_machine_or( volatile void *ptr, uintptr_t addend ) {
117 __sync_fetch_and_or(reinterpret_cast<volatile uintptr_t *>(ptr),addend);
118}
119
120static inline void __TBB_machine_and( volatile void *ptr, uintptr_t addend ) {
121 __sync_fetch_and_and(reinterpret_cast<volatile uintptr_t *>(ptr),addend);
122}
123
125 return __sync_lock_test_and_set(&flag,1)==0;
126}
127
129 __sync_lock_release(&flag);
130}
131
132#else
133// __TBB_GCC_VERSION >= 40700; use __atomic_* builtins available since gcc 4.7
134
135static inline void __TBB_machine_or( volatile void *ptr, uintptr_t addend ) {
136 __atomic_fetch_or(reinterpret_cast<volatile uintptr_t *>(ptr),addend,__ATOMIC_SEQ_CST);
137}
138
139static inline void __TBB_machine_and( volatile void *ptr, uintptr_t addend ) {
140 __atomic_fetch_and(reinterpret_cast<volatile uintptr_t *>(ptr),addend,__ATOMIC_SEQ_CST);
141}
142
144 return !__atomic_test_and_set(&flag,__ATOMIC_ACQUIRE);
145}
146
147inline void __TBB_machine_unlock_byte( __TBB_atomic_flag &flag ) {
148 __atomic_clear(&flag,__ATOMIC_RELEASE);
149}
150
151namespace tbb { namespace internal {
152
157template <typename T, int MemOrder>
158inline T __TBB_machine_atomic_load( const volatile T& location) {
159 if (MemOrder == __ATOMIC_SEQ_CST) __TBB_compiler_fence();
160 T value = __atomic_load_n(&location, MemOrder);
161 if (MemOrder != __ATOMIC_RELAXED) __TBB_compiler_fence();
162 return value;
163}
164
165template <typename T, int MemOrder>
166inline void __TBB_machine_atomic_store( volatile T& location, T value) {
167 if (MemOrder != __ATOMIC_RELAXED) __TBB_compiler_fence();
168 __atomic_store_n(&location, value, MemOrder);
169 if (MemOrder == __ATOMIC_SEQ_CST) __TBB_compiler_fence();
170}
171
172template <typename T, size_t S>
173struct machine_load_store {
174 static T load_with_acquire ( const volatile T& location ) {
175 return __TBB_machine_atomic_load<T, __ATOMIC_ACQUIRE>(location);
176 }
177 static void store_with_release ( volatile T &location, T value ) {
178 __TBB_machine_atomic_store<T, __ATOMIC_RELEASE>(location, value);
179 }
180};
181
182template <typename T, size_t S>
183struct machine_load_store_relaxed {
184 static inline T load ( const volatile T& location ) {
185 return __TBB_machine_atomic_load<T, __ATOMIC_RELAXED>(location);
186 }
187 static inline void store ( volatile T& location, T value ) {
188 __TBB_machine_atomic_store<T, __ATOMIC_RELAXED>(location, value);
189 }
190};
191
192template <typename T, size_t S>
193struct machine_load_store_seq_cst {
194 static T load ( const volatile T& location ) {
195 return __TBB_machine_atomic_load<T, __ATOMIC_SEQ_CST>(location);
196 }
197 static void store ( volatile T &location, T value ) {
198 __TBB_machine_atomic_store<T, __ATOMIC_SEQ_CST>(location, value);
199 }
200};
201
202}} // namespace tbb::internal
203
204#endif // __TBB_GCC_VERSION < 40700
205
206// Machine specific atomic operations
207#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V)
208#define __TBB_AtomicAND(P,V) __TBB_machine_and(P,V)
209
210#define __TBB_TryLockByte __TBB_machine_try_lock_byte
211#define __TBB_UnlockByte __TBB_machine_unlock_byte
212
213// __builtin_clz counts the number of leading zeroes
214namespace tbb{ namespace internal { namespace gcc_builtins {
215 inline int clz(unsigned int x){ return __builtin_clz(x); }
216 inline int clz(unsigned long int x){ return __builtin_clzl(x); }
217 inline int clz(unsigned long long int x){ return __builtin_clzll(x); }
218}}}
219// logarithm is the index of the most significant non-zero bit
220static inline intptr_t __TBB_machine_lg( uintptr_t x ) {
221 // If P is a power of 2 and x<P, then (P-1)-x == (P-1) XOR x
222 return (sizeof(x)*8 - 1) ^ tbb::internal::gcc_builtins::clz(x);
223}
224
225#define __TBB_Log2(V) __TBB_machine_lg(V)
226
227#if __TBB_WORDSIZE==4
228 #define __TBB_USE_GENERIC_DWORD_LOAD_STORE 1
229#endif
230
231#if __TBB_x86_32 || __TBB_x86_64
232#include "gcc_ia32_common.h"
233#endif
unsigned char __TBB_Flag
#define __TBB_MACHINE_DEFINE_ATOMICS(S, T)
Definition gcc_generic.h:62
static void __TBB_machine_or(volatile void *ptr, uintptr_t addend)
bool __TBB_machine_try_lock_byte(__TBB_atomic_flag &flag)
void __TBB_machine_unlock_byte(__TBB_atomic_flag &flag)
static void __TBB_machine_and(volatile void *ptr, uintptr_t addend)
__TBB_atomic __TBB_Flag __TBB_atomic_flag
static intptr_t __TBB_machine_lg(uintptr_t x)
#define __TBB_compiler_fence()
Definition icc_generic.h:51
#define __TBB_atomic
Definition tbb_stddef.h:237
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t ITT_FORMAT d no args const wchar_t const wchar_t ITT_FORMAT s __itt_heap_function void size_t int ITT_FORMAT d __itt_heap_function void ITT_FORMAT p __itt_heap_function void void size_t int ITT_FORMAT d no args no args unsigned int ITT_FORMAT u const __itt_domain __itt_id ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain __itt_id ITT_FORMAT p const __itt_domain __itt_id __itt_timestamp __itt_timestamp ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain ITT_FORMAT p const __itt_domain __itt_string_handle unsigned long long value
The graph class.
int clz(unsigned int x)
static void store_with_release(volatile T &location, T value)
Definition icc_generic.h:98
static T load_with_acquire(const volatile T &location)
Definition icc_generic.h:95
static void store(T &location, T value)
static T load(const T &location)
static void store(volatile T &location, T value)
static T load(const volatile T &location)

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