Mock Version: 2.12 Mock Version: 2.12 Mock Version: 2.12 ENTER ['do_with_status'](['bash', '--login', '-c', '/usr/bin/rpmbuild -bs --target aarch64 --nodeps /builddir/build/SPECS/yosys.spec'], chrootPath='/var/lib/mock/f35-build-31607368-4326234/root'env={'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8'}shell=Falselogger=timeout=201600uid=1000gid=425user='mockbuild'nspawn_args=[]unshare_net=TrueprintOutput=False) Executing command: ['bash', '--login', '-c', '/usr/bin/rpmbuild -bs --target aarch64 --nodeps /builddir/build/SPECS/yosys.spec'] with env {'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8'} and shell False Building target platforms: aarch64 Building for target aarch64 setting SOURCE_DATE_EPOCH=1639008000 Wrote: /builddir/build/SRPMS/yosys-0.12-1.20211209gitcdb5711.fc35.src.rpm Child return code was: 0 ENTER ['do_with_status'](['bash', '--login', '-c', '/usr/bin/rpmbuild -bb --target aarch64 --nodeps /builddir/build/SPECS/yosys.spec'], chrootPath='/var/lib/mock/f35-build-31607368-4326234/root'env={'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8'}shell=Falselogger=timeout=201600uid=1000gid=425user='mockbuild'nspawn_args=[]unshare_net=TrueprintOutput=False) Executing command: ['bash', '--login', '-c', '/usr/bin/rpmbuild -bb --target aarch64 --nodeps /builddir/build/SPECS/yosys.spec'] with env {'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8'} and shell False Building target platforms: aarch64 Building for target aarch64 setting SOURCE_DATE_EPOCH=1639008000 Executing(%prep): /bin/sh -e /var/tmp/rpm-tmp.FBn4Ge + umask 022 + cd /builddir/build/BUILD + cd /builddir/build/BUILD + rm -rf yosys-cdb57118758f855518ad416d12728d72bff58c10 + /usr/bin/gzip -dc /builddir/build/SOURCES/yosys-cdb5711.tar.gz + /usr/bin/tar -xof - + STATUS=0 + '[' 0 -ne 0 ']' + cd yosys-cdb57118758f855518ad416d12728d72bff58c10 + /usr/bin/chmod -Rf a+rX,u+w,g-w,o-w . Patch #1 (yosys-cfginc.patch): + echo 'Patch #1 (yosys-cfginc.patch):' + /usr/bin/patch --no-backup-if-mismatch -f -p1 -b --suffix .cfginc --fuzz=0 patching file Makefile Hunk #1 succeeded at 734 (offset 32 lines). patching file tests/various/plugin.sh Patch #2 (yosys-mancfginc.patch): + echo 'Patch #2 (yosys-mancfginc.patch):' + /usr/bin/patch --no-backup-if-mismatch -f -p1 -b --suffix .mancfginc --fuzz=0 patching file manual/CHAPTER_Prog/Makefile patching file manual/PRESENTATION_Prog/Makefile + cp /builddir/build/SOURCES/viz.js . + cd /builddir/build/BUILD + cd yosys-cdb57118758f855518ad416d12728d72bff58c10 + /usr/bin/xz -dc /builddir/build/SOURCES/yosys_0.9-1.debian.tar.xz + /usr/bin/tar -xof - + STATUS=0 + '[' 0 -ne 0 ']' + /usr/bin/chmod -Rf a+rX,u+w,g-w,o-w . ++ find . -name '*.py' + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./backends/edif/runtest.py + touch -r ./backends/edif/runtest.py ./backends/edif/runtest.py.new + mv ./backends/edif/runtest.py.new ./backends/edif/runtest.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./backends/smt2/smtbmc.py + touch -r ./backends/smt2/smtbmc.py ./backends/smt2/smtbmc.py.new + mv ./backends/smt2/smtbmc.py.new ./backends/smt2/smtbmc.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./backends/smt2/smtio.py + touch -r ./backends/smt2/smtio.py ./backends/smt2/smtio.py.new + mv ./backends/smt2/smtio.py.new ./backends/smt2/smtio.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./examples/python-api/pass.py + touch -r ./examples/python-api/pass.py ./examples/python-api/pass.py.new + mv ./examples/python-api/pass.py.new ./examples/python-api/pass.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./examples/python-api/script.py + touch -r ./examples/python-api/script.py ./examples/python-api/script.py.new + mv ./examples/python-api/script.py.new ./examples/python-api/script.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./misc/__init__.py + touch -r ./misc/__init__.py ./misc/__init__.py.new + mv ./misc/__init__.py.new ./misc/__init__.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./misc/py_wrap_generator.py + touch -r ./misc/py_wrap_generator.py ./misc/py_wrap_generator.py.new + mv ./misc/py_wrap_generator.py.new ./misc/py_wrap_generator.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./passes/pmgen/pmgen.py + touch -r ./passes/pmgen/pmgen.py ./passes/pmgen/pmgen.py.new + mv ./passes/pmgen/pmgen.py.new ./passes/pmgen/pmgen.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/common/cellhelp.py + touch -r ./techlibs/common/cellhelp.py ./techlibs/common/cellhelp.py.new + mv ./techlibs/common/cellhelp.py.new ./techlibs/common/cellhelp.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/common/gen_fine_ffs.py + touch -r ./techlibs/common/gen_fine_ffs.py ./techlibs/common/gen_fine_ffs.py.new + mv ./techlibs/common/gen_fine_ffs.py.new ./techlibs/common/gen_fine_ffs.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/ecp5/brams_connect.py + touch -r ./techlibs/ecp5/brams_connect.py ./techlibs/ecp5/brams_connect.py.new + mv ./techlibs/ecp5/brams_connect.py.new ./techlibs/ecp5/brams_connect.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/ecp5/brams_init.py + touch -r ./techlibs/ecp5/brams_init.py ./techlibs/ecp5/brams_init.py.new + mv ./techlibs/ecp5/brams_init.py.new ./techlibs/ecp5/brams_init.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/ecp5/tests/test_diamond_ffs.py + touch -r ./techlibs/ecp5/tests/test_diamond_ffs.py ./techlibs/ecp5/tests/test_diamond_ffs.py.new + mv ./techlibs/ecp5/tests/test_diamond_ffs.py.new ./techlibs/ecp5/tests/test_diamond_ffs.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/gowin/brams_init.py + touch -r ./techlibs/gowin/brams_init.py ./techlibs/gowin/brams_init.py.new + mv ./techlibs/gowin/brams_init.py.new ./techlibs/gowin/brams_init.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/ice40/brams_init.py + touch -r ./techlibs/ice40/brams_init.py ./techlibs/ice40/brams_init.py.new + mv ./techlibs/ice40/brams_init.py.new ./techlibs/ice40/brams_init.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/nexus/cells_xtra.py + touch -r ./techlibs/nexus/cells_xtra.py ./techlibs/nexus/cells_xtra.py.new + mv ./techlibs/nexus/cells_xtra.py.new ./techlibs/nexus/cells_xtra.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/xilinx/brams_init.py + touch -r ./techlibs/xilinx/brams_init.py ./techlibs/xilinx/brams_init.py.new + mv ./techlibs/xilinx/brams_init.py.new ./techlibs/xilinx/brams_init.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./techlibs/xilinx/cells_xtra.py + touch -r ./techlibs/xilinx/cells_xtra.py ./techlibs/xilinx/cells_xtra.py.new + mv ./techlibs/xilinx/cells_xtra.py.new ./techlibs/xilinx/cells_xtra.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/bram/generate.py + touch -r ./tests/bram/generate.py ./tests/bram/generate.py.new + mv ./tests/bram/generate.py.new ./tests/bram/generate.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/fsm/generate.py + touch -r ./tests/fsm/generate.py ./tests/fsm/generate.py.new + mv ./tests/fsm/generate.py.new ./tests/fsm/generate.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/opt_share/generate.py + touch -r ./tests/opt_share/generate.py ./tests/opt_share/generate.py.new + mv ./tests/opt_share/generate.py.new ./tests/opt_share/generate.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/realmath/generate.py + touch -r ./tests/realmath/generate.py ./tests/realmath/generate.py.new + mv ./tests/realmath/generate.py.new ./tests/realmath/generate.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/rpc/frontend.py + touch -r ./tests/rpc/frontend.py ./tests/rpc/frontend.py.new + mv ./tests/rpc/frontend.py.new ./tests/rpc/frontend.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/share/generate.py + touch -r ./tests/share/generate.py ./tests/share/generate.py.new + mv ./tests/share/generate.py.new ./tests/share/generate.py + for f in `find . -name \*.py` + sed 's|/usr/bin/env python3|/usr/bin/python3|' ./tests/tools/txt2tikztiming.py + touch -r ./tests/tools/txt2tikztiming.py ./tests/tools/txt2tikztiming.py.new + mv ./tests/tools/txt2tikztiming.py.new ./tests/tools/txt2tikztiming.py + make config-gcc /bin/sh: line 1: clang: command not found rm -rf share rm -rf kernel/*.pyh if test -d manual; then cd manual && sh clean.sh; fi which () { ( alias; eval ${which_declare} ) | /usr/bin/which --tty-only --read-alias --read-functions --show-tilde --show-dot "$@" } find ./ -name '*.aux' | xargs rm -f find ./ -name '*.bbl' | xargs rm -f find ./ -name '*.blg' | xargs rm -f find ./ -name '*.idx' | xargs rm -f find ./ -name '*.log' | xargs rm -f find ./ -name '*.out' | xargs rm -f find ./ -name '*.pdf' | xargs rm -f find ./ -name '*.toc' | xargs rm -f find ./ -name '*.snm' | xargs rm -f find ./ -name '*.nav' | xargs rm -f find ./ -name '*.vrb' | xargs rm -f find ./ -name '*.ok' | xargs rm -f find ./CHAPTER_Prog/ -name 'stubnets.so' | xargs rm -f find ./CHAPTER_Prog/ -name 'stubnets.d' | xargs rm -f find ./CHAPTER_Prog/ -name '*.log' | xargs rm -f find ./PRESENTATION_ExAdv/ -name '*.dot' | xargs rm -f find ./PRESENTATION_ExOth/ -name '*.dot' | xargs rm -f find ./PRESENTATION_ExSyn/ -name '*.dot' | xargs rm -f find ./PRESENTATION_Intro/ -name 'counter_00.dot' | xargs rm -f find ./PRESENTATION_Intro/ -name 'counter_01.dot' | xargs rm -f find ./PRESENTATION_Intro/ -name 'counter_02.dot' | xargs rm -f find ./PRESENTATION_Intro/ -name 'counter_03.dot' | xargs rm -f find ./PRESENTATION_Prog/ -name 'my_cmd.so' | xargs rm -f find ./PRESENTATION_Prog/ -name 'my_cmd.d' | xargs rm -f rm -f kernel/version_UNKNOWN.o kernel/driver.o kernel/register.o kernel/rtlil.o kernel/log.o kernel/calc.o kernel/yosys.o kernel/binding.o kernel/cellaigs.o kernel/celledges.o kernel/satgen.o kernel/qcsat.o kernel/mem.o kernel/ffmerge.o kernel/ff.o libs/bigint/BigIntegerAlgorithms.o libs/bigint/BigInteger.o libs/bigint/BigIntegerUtils.o libs/bigint/BigUnsigned.o libs/bigint/BigUnsignedInABase.o libs/sha1/sha1.o libs/json11/json11.o libs/subcircuit/subcircuit.o libs/ezsat/ezsat.o libs/ezsat/ezminisat.o libs/minisat/Options.o libs/minisat/SimpSolver.o libs/minisat/Solver.o libs/minisat/System.o frontends/aiger/aigerparse.o frontends/ast/ast.o frontends/ast/simplify.o frontends/ast/genrtlil.o frontends/ast/dpicall.o frontends/ast/ast_binding.o frontends/blif/blifparse.o frontends/json/jsonparse.o frontends/liberty/liberty.o frontends/rpc/rpc_frontend.o frontends/rtlil/rtlil_parser.tab.o frontends/rtlil/rtlil_lexer.o frontends/rtlil/rtlil_frontend.o frontends/verific/verific.o frontends/verilog/verilog_parser.tab.o frontends/verilog/verilog_lexer.o frontends/verilog/preproc.o frontends/verilog/verilog_frontend.o frontends/verilog/const2ast.o passes/cmds/exec.o passes/cmds/add.o passes/cmds/delete.o passes/cmds/design.o passes/cmds/select.o passes/cmds/show.o passes/cmds/rename.o passes/cmds/autoname.o passes/cmds/connect.o passes/cmds/scatter.o passes/cmds/setundef.o passes/cmds/splitnets.o passes/cmds/stat.o passes/cmds/setattr.o passes/cmds/copy.o passes/cmds/splice.o passes/cmds/scc.o passes/cmds/torder.o passes/cmds/logcmd.o passes/cmds/tee.o passes/cmds/write_file.o passes/cmds/connwrappers.o passes/cmds/cover.o passes/cmds/trace.o passes/cmds/plugin.o passes/cmds/check.o passes/cmds/qwp.o passes/cmds/edgetypes.o passes/cmds/portlist.o passes/cmds/chformal.o passes/cmds/chtype.o passes/cmds/blackbox.o passes/cmds/ltp.o passes/cmds/bugpoint.o passes/cmds/scratchpad.o passes/cmds/logger.o passes/cmds/printattrs.o passes/cmds/sta.o passes/equiv/equiv_make.o passes/equiv/equiv_miter.o passes/equiv/equiv_simple.o passes/equiv/equiv_status.o passes/equiv/equiv_add.o passes/equiv/equiv_remove.o passes/equiv/equiv_induct.o passes/equiv/equiv_struct.o passes/equiv/equiv_purge.o passes/equiv/equiv_mark.o passes/equiv/equiv_opt.o passes/fsm/fsm.o passes/fsm/fsm_detect.o passes/fsm/fsm_extract.o passes/fsm/fsm_opt.o passes/fsm/fsm_expand.o passes/fsm/fsm_recode.o passes/fsm/fsm_info.o passes/fsm/fsm_export.o passes/fsm/fsm_map.o passes/hierarchy/hierarchy.o passes/hierarchy/uniquify.o passes/hierarchy/submod.o passes/memory/memory.o passes/memory/memory_dff.o passes/memory/memory_share.o passes/memory/memory_collect.o passes/memory/memory_unpack.o passes/memory/memory_bram.o passes/memory/memory_map.o passes/memory/memory_memx.o passes/memory/memory_nordff.o passes/memory/memory_narrow.o passes/opt/opt.o passes/opt/opt_merge.o passes/opt/opt_mem.o passes/opt/opt_mem_feedback.o passes/opt/opt_mem_priority.o passes/opt/opt_mem_widen.o passes/opt/opt_muxtree.o passes/opt/opt_reduce.o passes/opt/opt_dff.o passes/opt/opt_share.o passes/opt/opt_clean.o passes/opt/opt_expr.o passes/opt/share.o passes/opt/wreduce.o passes/opt/opt_demorgan.o passes/opt/rmports.o passes/opt/opt_lut.o passes/opt/opt_lut_ins.o passes/opt/pmux2shiftx.o passes/opt/muxpack.o passes/pmgen/test_pmgen.o passes/pmgen/ice40_dsp.o passes/pmgen/ice40_wrapcarry.o passes/pmgen/xilinx_dsp.o passes/pmgen/peepopt.o passes/pmgen/xilinx_srl.o passes/proc/proc.o passes/proc/proc_prune.o passes/proc/proc_clean.o passes/proc/proc_rmdead.o passes/proc/proc_init.o passes/proc/proc_arst.o passes/proc/proc_mux.o passes/proc/proc_dlatch.o passes/proc/proc_dff.o passes/proc/proc_memwr.o passes/sat/sat.o passes/sat/freduce.o passes/sat/eval.o passes/sat/sim.o passes/sat/miter.o passes/sat/expose.o passes/sat/assertpmux.o passes/sat/clk2fflogic.o passes/sat/async2sync.o passes/sat/supercover.o passes/sat/fmcombine.o passes/sat/mutate.o passes/sat/cutpoint.o passes/sat/fminit.o passes/sat/qbfsat.o passes/techmap/flatten.o passes/techmap/techmap.o passes/techmap/simplemap.o passes/techmap/dfflibmap.o passes/techmap/maccmap.o passes/techmap/libparse.o passes/techmap/abc.o passes/techmap/abc9.o passes/techmap/abc9_exe.o passes/techmap/abc9_ops.o passes/techmap/iopadmap.o passes/techmap/clkbufmap.o passes/techmap/hilomap.o passes/techmap/extract.o passes/techmap/extract_fa.o passes/techmap/extract_counter.o passes/techmap/extract_reduce.o passes/techmap/alumacc.o passes/techmap/dffinit.o passes/techmap/pmuxtree.o passes/techmap/muxcover.o passes/techmap/aigmap.o passes/techmap/tribuf.o passes/techmap/lut2mux.o passes/techmap/nlutmap.o passes/techmap/shregmap.o passes/techmap/deminout.o passes/techmap/insbuf.o passes/techmap/attrmvcp.o passes/techmap/attrmap.o passes/techmap/zinit.o passes/techmap/dfflegalize.o passes/techmap/dffunmap.o passes/techmap/flowmap.o passes/techmap/extractinv.o passes/tests/test_autotb.o passes/tests/test_cell.o passes/tests/test_abcloop.o backends/aiger/aiger.o backends/aiger/xaiger.o backends/blif/blif.o backends/btor/btor.o backends/cxxrtl/cxxrtl_backend.o backends/edif/edif.o backends/firrtl/firrtl.o backends/intersynth/intersynth.o backends/json/json.o backends/rtlil/rtlil_backend.o backends/simplec/simplec.o backends/smt2/smt2.o backends/smv/smv.o backends/spice/spice.o backends/table/table.o backends/verilog/verilog_backend.o techlibs/achronix/synth_achronix.o techlibs/anlogic/synth_anlogic.o techlibs/anlogic/anlogic_eqn.o techlibs/anlogic/anlogic_fixcarry.o techlibs/common/synth.o techlibs/common/prep.o techlibs/coolrunner2/synth_coolrunner2.o techlibs/coolrunner2/coolrunner2_sop.o techlibs/coolrunner2/coolrunner2_fixup.o techlibs/easic/synth_easic.o techlibs/ecp5/synth_ecp5.o techlibs/ecp5/ecp5_gsr.o techlibs/efinix/synth_efinix.o techlibs/efinix/efinix_fixcarry.o techlibs/gatemate/synth_gatemate.o techlibs/gowin/synth_gowin.o techlibs/greenpak4/synth_greenpak4.o techlibs/greenpak4/greenpak4_dffinv.o techlibs/ice40/synth_ice40.o techlibs/ice40/ice40_braminit.o techlibs/ice40/ice40_opt.o techlibs/intel/synth_intel.o techlibs/intel_alm/synth_intel_alm.o techlibs/machxo2/synth_machxo2.o techlibs/nexus/synth_nexus.o techlibs/quicklogic/synth_quicklogic.o techlibs/sf2/synth_sf2.o techlibs/xilinx/synth_xilinx.o techlibs/xilinx/xilinx_dffopt.o frontends/rtlil/rtlil_parser.tab.cc frontends/rtlil/rtlil_parser.tab.hh frontends/rtlil/rtlil_parser.output frontends/rtlil/rtlil_lexer.cc frontends/verilog/verilog_parser.tab.cc frontends/verilog/verilog_parser.tab.hh frontends/verilog/verilog_parser.output frontends/verilog/verilog_lexer.cc passes/pmgen/test_pmgen_pm.h passes/pmgen/ice40_dsp_pm.h passes/pmgen/ice40_wrapcarry_pm.h passes/pmgen/xilinx_dsp_pm.h passes/pmgen/xilinx_dsp48a_pm.h passes/pmgen/xilinx_dsp_CREG_pm.h passes/pmgen/xilinx_dsp_cascade_pm.h passes/pmgen/peepopt_pm.h passes/pmgen/xilinx_srl_pm.h techlibs/common/simlib_help.inc techlibs/common/simcells_help.inc techlibs/ecp5/bram_init_1_2_4.vh techlibs/ecp5/bram_init_9_18_36.vh techlibs/ecp5/bram_conn_1.vh techlibs/ecp5/bram_conn_2.vh techlibs/ecp5/bram_conn_4.vh techlibs/ecp5/bram_conn_9.vh techlibs/ecp5/bram_conn_18.vh techlibs/ecp5/bram_conn_36.vh techlibs/gowin/bram_init_16.vh techlibs/ice40/brams_init1.vh techlibs/ice40/brams_init2.vh techlibs/ice40/brams_init3.vh techlibs/xilinx/brams_init_36.vh techlibs/xilinx/brams_init_32.vh techlibs/xilinx/brams_init_18.vh techlibs/xilinx/brams_init_16.vh techlibs/xilinx/brams_init_9.vh techlibs/xilinx/brams_init_8.vh yosys yosys-config yosys-abc yosys-filterlib yosys-smtbmc share/include/kernel/yosys.h share/include/kernel/hashlib.h share/include/kernel/log.h share/include/kernel/rtlil.h share/include/kernel/binding.h share/include/kernel/register.h share/include/kernel/celltypes.h share/include/kernel/celledges.h share/include/kernel/consteval.h share/include/kernel/constids.inc share/include/kernel/sigtools.h share/include/kernel/modtools.h share/include/kernel/macc.h share/include/kernel/utils.h share/include/kernel/satgen.h share/include/kernel/qcsat.h share/include/kernel/ff.h share/include/kernel/ffinit.h share/include/kernel/mem.h share/include/libs/ezsat/ezsat.h share/include/libs/ezsat/ezminisat.h share/include/libs/sha1/sha1.h share/include/libs/json11/json11.hpp share/include/passes/fsm/fsmdata.h share/include/frontends/ast/ast.h share/include/frontends/ast/ast_binding.h share/include/frontends/blif/blifparse.h share/include/backends/rtlil/rtlil_backend.h share/include/backends/cxxrtl/cxxrtl.h share/include/backends/cxxrtl/cxxrtl_vcd.h share/include/backends/cxxrtl/cxxrtl_capi.cc share/include/backends/cxxrtl/cxxrtl_capi.h share/include/backends/cxxrtl/cxxrtl_vcd_capi.cc share/include/backends/cxxrtl/cxxrtl_vcd_capi.h share/python3/smtio.py share/achronix/speedster22i/cells_sim.v share/achronix/speedster22i/cells_map.v share/anlogic/cells_map.v share/anlogic/arith_map.v share/anlogic/cells_sim.v share/anlogic/eagle_bb.v share/anlogic/lutrams.txt share/anlogic/lutrams_map.v share/anlogic/lutram_init_16x4.vh share/simlib.v share/simcells.v share/techmap.v share/pmux2mux.v share/adff2dff.v share/dff2ff.v share/gate2lut.v share/cmp2lut.v share/cells.lib share/mul2dsp.v share/abc9_model.v share/abc9_map.v share/abc9_unmap.v share/cmp2lcu.v share/coolrunner2/cells_latch.v share/coolrunner2/cells_sim.v share/coolrunner2/cells_counter_map.v share/coolrunner2/tff_extract.v share/coolrunner2/xc2_dff.lib share/ecp5/cells_ff.vh share/ecp5/cells_io.vh share/ecp5/cells_map.v share/ecp5/cells_sim.v share/ecp5/cells_bb.v share/ecp5/lutrams_map.v share/ecp5/lutrams.txt share/ecp5/brams_map.v share/ecp5/brams.txt share/ecp5/arith_map.v share/ecp5/latches_map.v share/ecp5/dsp_map.v share/ecp5/bram_init_1_2_4.vh share/ecp5/bram_init_9_18_36.vh share/ecp5/bram_conn_1.vh share/ecp5/bram_conn_2.vh share/ecp5/bram_conn_4.vh share/ecp5/bram_conn_9.vh share/ecp5/bram_conn_18.vh share/ecp5/bram_conn_36.vh share/efinix/cells_map.v share/efinix/arith_map.v share/efinix/cells_sim.v share/efinix/brams_map.v share/efinix/gbuf_map.v share/efinix/brams.txt share/gatemate/reg_map.v share/gatemate/mux_map.v share/gatemate/lut_map.v share/gatemate/mul_map.v share/gatemate/arith_map.v share/gatemate/cells_sim.v share/gatemate/cells_bb.v share/gatemate/brams_map.v share/gatemate/brams.txt share/gatemate/brams_init_20.vh share/gatemate/brams_init_40.vh share/gowin/cells_map.v share/gowin/cells_sim.v share/gowin/arith_map.v share/gowin/brams_map.v share/gowin/brams.txt share/gowin/lutrams_map.v share/gowin/lutrams.txt share/gowin/brams_init3.vh share/gowin/bram_init_16.vh share/greenpak4/cells_blackbox.v share/greenpak4/cells_latch.v share/greenpak4/cells_map.v share/greenpak4/cells_sim.v share/greenpak4/cells_sim_ams.v share/greenpak4/cells_sim_digital.v share/greenpak4/cells_sim_wip.v share/greenpak4/gp_dff.lib share/ice40/arith_map.v share/ice40/cells_map.v share/ice40/ff_map.v share/ice40/cells_sim.v share/ice40/latches_map.v share/ice40/brams.txt share/ice40/brams_map.v share/ice40/dsp_map.v share/ice40/abc9_model.v share/ice40/brams_init1.vh share/ice40/brams_init2.vh share/ice40/brams_init3.vh share/intel/common/m9k_bb.v share/intel/common/altpll_bb.v share/intel/common/brams_m9k.txt share/intel/common/brams_map_m9k.v share/intel/common/ff_map.v share/intel/max10/cells_sim.v share/intel/cyclone10lp/cells_sim.v share/intel/cycloneiv/cells_sim.v share/intel/cycloneive/cells_sim.v share/intel/max10/cells_map.v share/intel/cyclone10lp/cells_map.v share/intel/cycloneiv/cells_map.v share/intel/cycloneive/cells_map.v share/intel_alm/common/abc9_map.v share/intel_alm/common/abc9_unmap.v share/intel_alm/common/abc9_model.v share/intel_alm/common/alm_map.v share/intel_alm/common/alm_sim.v share/intel_alm/common/arith_alm_map.v share/intel_alm/common/dff_map.v share/intel_alm/common/dff_sim.v share/intel_alm/common/dsp_sim.v share/intel_alm/common/dsp_map.v share/intel_alm/common/mem_sim.v share/intel_alm/common/misc_sim.v share/intel_alm/cyclonev/cells_sim.v share/intel_alm/common/bram_m10k.txt share/intel_alm/common/bram_m20k.txt share/intel_alm/common/bram_m20k_map.v share/intel_alm/common/lutram_mlab.txt share/intel_alm/common/megafunction_bb.v share/intel_alm/common/quartus_rename.v share/machxo2/cells_map.v share/machxo2/cells_sim.v share/nexus/cells_map.v share/nexus/cells_sim.v share/nexus/parse_init.vh share/nexus/cells_xtra.v share/nexus/lutrams_map.v share/nexus/lutrams.txt share/nexus/brams_init.vh share/nexus/brams_map.v share/nexus/brams.txt share/nexus/lrams_init.vh share/nexus/lrams_map.v share/nexus/lrams.txt share/nexus/arith_map.v share/nexus/latches_map.v share/nexus/dsp_map.v share/quicklogic/pp3_ffs_map.v share/quicklogic/pp3_lut_map.v share/quicklogic/pp3_latches_map.v share/quicklogic/pp3_cells_map.v share/quicklogic/cells_sim.v share/quicklogic/lut_sim.v share/quicklogic/pp3_cells_sim.v share/quicklogic/abc9_model.v share/quicklogic/abc9_map.v share/quicklogic/abc9_unmap.v share/sf2/arith_map.v share/sf2/cells_map.v share/sf2/cells_sim.v share/xilinx/cells_map.v share/xilinx/cells_sim.v share/xilinx/cells_xtra.v share/xilinx/xc2v_brams.txt share/xilinx/xc2v_brams_map.v share/xilinx/xc3sa_brams.txt share/xilinx/xc3sda_brams.txt share/xilinx/xc6s_brams.txt share/xilinx/xc6s_brams_map.v share/xilinx/xc7_xcu_brams.txt share/xilinx/xc7_brams_map.v share/xilinx/xcu_brams_map.v share/xilinx/xcup_urams.txt share/xilinx/xcup_urams_map.v share/xilinx/lut4_lutrams.txt share/xilinx/lut6_lutrams.txt share/xilinx/lutrams_map.v share/xilinx/arith_map.v share/xilinx/ff_map.v share/xilinx/lut_map.v share/xilinx/mux_map.v share/xilinx/xc3s_mult_map.v share/xilinx/xc3sda_dsp_map.v share/xilinx/xc6s_dsp_map.v share/xilinx/xc4v_dsp_map.v share/xilinx/xc5v_dsp_map.v share/xilinx/xc7_dsp_map.v share/xilinx/xcu_dsp_map.v share/xilinx/abc9_model.v share/xilinx/brams_init_36.vh share/xilinx/brams_init_32.vh share/xilinx/brams_init_18.vh share/xilinx/brams_init_16.vh share/xilinx/brams_init_9.vh share/xilinx/brams_init_8.vh passes/pmgen/test_pmgen_pm.h passes/pmgen/ice40_dsp_pm.h passes/pmgen/ice40_wrapcarry_pm.h passes/pmgen/xilinx_dsp_pm.h passes/pmgen/xilinx_dsp48a_pm.h passes/pmgen/xilinx_dsp_CREG_pm.h passes/pmgen/xilinx_dsp_cascade_pm.h passes/pmgen/peepopt_pm.h passes/pmgen/xilinx_srl_pm.h passes/techmap/filterlib.o techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk techlibs/gowin/brams_init.mk techlibs/ice40/brams_init.mk techlibs/xilinx/brams_init.mk .cc rm -f kernel/version_*.o kernel/version_*.cc rm -f libs/*/*.d frontends/*/*.d passes/*/*.d backends/*/*.d kernel/*.d techlibs/*/*.d rm -rf tests/asicworld/*.out tests/asicworld/*.log rm -rf tests/hana/*.out tests/hana/*.log rm -rf tests/simple/*.out tests/simple/*.log rm -rf tests/memories/*.out tests/memories/*.log tests/memories/*.dmp rm -rf tests/sat/*.log tests/techmap/*.log tests/various/*.log rm -rf tests/bram/temp tests/fsm/temp tests/realmath/temp tests/share/temp tests/smv/temp rm -rf vloghtb/Makefile vloghtb/refdat vloghtb/rtl vloghtb/scripts vloghtb/spec vloghtb/check_yosys vloghtb/vloghammer_tb.tar.bz2 vloghtb/temp vloghtb/log_test_* rm -f tests/svinterfaces/*.log_stdout tests/svinterfaces/*.log_stderr tests/svinterfaces/dut_result.txt tests/svinterfaces/reference_result.txt tests/svinterfaces/a.out tests/svinterfaces/*_syn.v tests/svinterfaces/*.diff rm -f tests/tools/cmp_tbdata echo 'CONFIG := gcc' > Makefile.conf ++ find manual -name '*.tex' -exec grep -l '{luximono}' '{}' ';' + for f in `find manual -name \*.tex -exec grep -l {luximono} {} \;` + sed -i 's|{luximono}|{libertine}|' manual/APPNOTE_010_Verilog_to_BLIF.tex + for f in `find manual -name \*.tex -exec grep -l {luximono} {} \;` + sed -i 's|{luximono}|{libertine}|' manual/APPNOTE_011_Design_Investigation.tex + for f in `find manual -name \*.tex -exec grep -l {luximono} {} \;` + sed -i 's|{luximono}|{libertine}|' manual/APPNOTE_012_Verilog_to_BTOR.tex + for f in `find manual -name \*.tex -exec grep -l {luximono} {} \;` + sed -i 's|{luximono}|{libertine}|' manual/manual.tex + for f in `find manual -name \*.tex -exec grep -l {luximono} {} \;` + sed -i 's|{luximono}|{libertine}|' manual/presentation.tex + RPM_EC=0 ++ jobs -p + exit 0 Executing(%build): /bin/sh -e /var/tmp/rpm-tmp.8j35IK + umask 022 + cd /builddir/build/BUILD + cd yosys-cdb57118758f855518ad416d12728d72bff58c10 + CFLAGS='-O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + export CFLAGS + CXXFLAGS='-O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + export CXXFLAGS + FFLAGS='-O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -I/usr/lib64/gfortran/modules' + export FFLAGS + FCFLAGS='-O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -I/usr/lib64/gfortran/modules' + export FCFLAGS + LDFLAGS='-Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 ' + export LDFLAGS + LT_SYS_LIBRARY_PATH=/usr/lib64: + export LT_SYS_LIBRARY_PATH + CC=gcc + export CC + CXX=g++ + export CXX + make -j5 PREFIX=/usr ABCEXTERNAL=/usr/bin/abc PRETTY=0 all manual [Makefile.conf] CONFIG := gcc rm -f kernel/version_*.o kernel/version_*.d kernel/version_*.cc mkdir -p kernel/ mkdir -p techlibs/common gcc -o kernel/driver.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/driver.cc mkdir -p techlibs/common python3 techlibs/common/cellhelp.py techlibs/common/simlib.v > techlibs/common/simlib_help.inc.new mkdir -p kernel && echo "namespace Yosys { extern const char *yosys_version_str; const char *yosys_version_str=\"Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os)\"; }" > kernel/version_UNKNOWN.cc mkdir -p kernel/ python3 techlibs/common/cellhelp.py techlibs/common/simcells.v > techlibs/common/simcells_help.inc.new gcc -o kernel/rtlil.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/rtlil.cc mkdir -p kernel/ gcc -o kernel/log.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DYOSYS_SRC='"./"' kernel/log.cc mv techlibs/common/simlib_help.inc.new techlibs/common/simlib_help.inc mkdir -p kernel/ gcc -o kernel/calc.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/calc.cc mv techlibs/common/simcells_help.inc.new techlibs/common/simcells_help.inc mkdir -p kernel/ gcc -o kernel/yosys.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DABCEXTERNAL='"/usr/bin/abc"' -DYOSYS_DATDIR='"/usr/share/yosys"' -DYOSYS_PROGRAM_PREFIX='""' kernel/yosys.cc mkdir -p kernel/ gcc -o kernel/binding.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/binding.cc mkdir -p kernel/ gcc -o kernel/cellaigs.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/cellaigs.cc mkdir -p kernel/ gcc -o kernel/celledges.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/celledges.cc mkdir -p kernel/ gcc -o kernel/satgen.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/satgen.cc mkdir -p kernel/ gcc -o kernel/qcsat.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/qcsat.cc mkdir -p kernel/ gcc -o kernel/mem.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/mem.cc mkdir -p kernel/ gcc -o kernel/ffmerge.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/ffmerge.cc mkdir -p kernel/ gcc -o kernel/ff.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/ff.cc mkdir -p libs/bigint/ gcc -o libs/bigint/BigIntegerAlgorithms.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/bigint/BigIntegerAlgorithms.cc mkdir -p libs/bigint/ gcc -o libs/bigint/BigInteger.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/bigint/BigInteger.cc mkdir -p libs/bigint/ gcc -o libs/bigint/BigIntegerUtils.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/bigint/BigIntegerUtils.cc mkdir -p libs/bigint/ gcc -o libs/bigint/BigUnsigned.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/bigint/BigUnsigned.cc mkdir -p libs/bigint/ gcc -o libs/bigint/BigUnsignedInABase.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/bigint/BigUnsignedInABase.cc mkdir -p libs/sha1/ gcc -o libs/sha1/sha1.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/sha1/sha1.cpp kernel/satgen.cc: In member function 'bool Yosys::SatGen::importCell(Yosys::RTLIL::Cell*, int)': kernel/satgen.cc:1137:67: warning: 'undef_srst' may be used uninitialized in this function [-Wmaybe-uninitialized] 1137 | std::tie(d, undef_d) = mux(srst, undef_srst, rval, undef_rval, d, undef_d); | ~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ kernel/satgen.cc:1123:67: warning: 'undef_ce' may be used uninitialized in this function [-Wmaybe-uninitialized] 1123 | std::tie(d, undef_d) = mux(ce, undef_ce, d, undef_d, old_q, undef_old_q); | ~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ kernel/satgen.cc:1109:67: warning: 'undef_srst' may be used uninitialized in this function [-Wmaybe-uninitialized] 1109 | std::tie(d, undef_d) = mux(srst, undef_srst, rval, undef_rval, d, undef_d); | ~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ mkdir -p libs/json11/ gcc -o libs/json11/json11.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/json11/json11.cpp mkdir -p libs/subcircuit/ gcc -o libs/subcircuit/subcircuit.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/subcircuit/subcircuit.cc mkdir -p libs/ezsat/ gcc -o libs/ezsat/ezsat.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/ezsat/ezsat.cc mkdir -p libs/ezsat/ gcc -o libs/ezsat/ezminisat.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/ezsat/ezminisat.cc mkdir -p libs/minisat/ gcc -o libs/minisat/Options.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/Options.cc mkdir -p libs/minisat/ gcc -o libs/minisat/SimpSolver.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/SimpSolver.cc In file included from libs/minisat/Sort.h:24, from libs/minisat/SimpSolver.cc:27: libs/minisat/Vec.h: In instantiation of 'void Minisat::vec::capacity(Minisat::vec::Size) [with T = Minisat::vec; _Size = int; Minisat::vec::Size = int]': libs/minisat/Vec.h:119:13: required from 'void Minisat::vec::growTo(Minisat::vec::Size) [with T = Minisat::vec; _Size = int; Minisat::vec::Size = int]' libs/minisat/IntMap.h:48:58: required from 'void Minisat::IntMap::reserve(K) [with K = int; V = Minisat::vec; MkIndex = Minisat::MkIndexDefault]' libs/minisat/SolverTypes.h:338:49: required from 'void Minisat::OccLists::init(const K&) [with K = int; Vec = Minisat::vec; Deleted = Minisat::SimpSolver::ClauseDeleted; MkIndex = Minisat::MkIndexDefault]' libs/minisat/SimpSolver.cc:92:26: required from here libs/minisat/Vec.h:103:33: warning: 'void* realloc(void*, size_t)' moving an object of non-trivially copyable type 'class Minisat::vec'; use 'new' and 'delete' instead [-Wclass-memaccess] 103 | || (((data = (T*)::realloc(data, (cap += add) * sizeof(T))) == NULL) && errno == ENOMEM) ) | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from libs/minisat/Sort.h:24, from libs/minisat/SimpSolver.cc:27: libs/minisat/Vec.h:39:7: note: 'class Minisat::vec' declared here 39 | class vec { | ^~~ mkdir -p libs/minisat/ gcc -o libs/minisat/Solver.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/Solver.cc In file included from libs/minisat/Alg.h:24, from libs/minisat/Solver.cc:29: libs/minisat/Vec.h: In instantiation of 'void Minisat::vec::capacity(Minisat::vec::Size) [with T = Minisat::vec; _Size = int; Minisat::vec::Size = int]': libs/minisat/Vec.h:119:13: required from 'void Minisat::vec::growTo(Minisat::vec::Size) [with T = Minisat::vec; _Size = int; Minisat::vec::Size = int]' libs/minisat/IntMap.h:48:58: required from 'void Minisat::IntMap::reserve(K) [with K = Minisat::Lit; V = Minisat::vec; MkIndex = Minisat::MkIndexLit]' libs/minisat/SolverTypes.h:338:49: required from 'void Minisat::OccLists::init(const K&) [with K = Minisat::Lit; Vec = Minisat::vec; Deleted = Minisat::Solver::WatcherDeleted; MkIndex = Minisat::MkIndexLit]' libs/minisat/Solver.cc:134:19: required from here libs/minisat/Vec.h:103:33: warning: 'void* realloc(void*, size_t)' moving an object of non-trivially copyable type 'class Minisat::vec'; use 'new' and 'delete' instead [-Wclass-memaccess] 103 | || (((data = (T*)::realloc(data, (cap += add) * sizeof(T))) == NULL) && errno == ENOMEM) ) | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from libs/minisat/Alg.h:24, from libs/minisat/Solver.cc:29: libs/minisat/Vec.h:39:7: note: 'class Minisat::vec' declared here 39 | class vec { | ^~~ mkdir -p libs/minisat/ gcc -o libs/minisat/System.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER libs/minisat/System.cc mkdir -p frontends/aiger/ gcc -o frontends/aiger/aigerparse.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/aiger/aigerparse.cc mkdir -p frontends/ast/ gcc -o frontends/ast/ast.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/ast/ast.cc mkdir -p frontends/ast/ gcc -o frontends/ast/simplify.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/ast/simplify.cc mkdir -p frontends/ast/ gcc -o frontends/ast/genrtlil.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/ast/genrtlil.cc mkdir -p frontends/ast/ gcc -o frontends/ast/dpicall.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/ast/dpicall.cc mkdir -p frontends/ast/ gcc -o frontends/ast/ast_binding.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/ast/ast_binding.cc mkdir -p frontends/blif/ gcc -o frontends/blif/blifparse.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/blif/blifparse.cc mkdir -p frontends/json/ gcc -o frontends/json/jsonparse.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/json/jsonparse.cc mkdir -p frontends/liberty/ gcc -o frontends/liberty/liberty.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/liberty/liberty.cc mkdir -p frontends/rpc/ gcc -o frontends/rpc/rpc_frontend.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/rpc/rpc_frontend.cc mkdir -p frontends/rtlil/ bison -o frontends/rtlil/rtlil_parser.tab.cc -d -r all -b frontends/rtlil/rtlil_parser frontends/rtlil/rtlil_parser.y mkdir -p frontends/rtlil/ flex -o frontends/rtlil/rtlil_lexer.cc frontends/rtlil/rtlil_lexer.l mkdir -p frontends/rtlil/ gcc -o frontends/rtlil/rtlil_frontend.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/rtlil/rtlil_frontend.cc mkdir -p frontends/verific/ gcc -o frontends/verific/verific.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/verific/verific.cc mkdir -p frontends/verilog/ bison -Wall -Werror -o frontends/verilog/verilog_parser.tab.cc -d -r all -b frontends/verilog/verilog_parser frontends/verilog/verilog_parser.y mkdir -p frontends/verilog/ gcc -o frontends/verilog/preproc.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/verilog/preproc.cc mkdir -p frontends/verilog/ gcc -o frontends/verilog/verilog_frontend.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/verilog/verilog_frontend.cc mkdir -p frontends/verilog/ gcc -o frontends/verilog/const2ast.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/verilog/const2ast.cc mkdir -p passes/cmds/ gcc -o passes/cmds/exec.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/exec.cc mkdir -p passes/cmds/ gcc -o passes/cmds/add.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/add.cc mkdir -p passes/cmds/ gcc -o passes/cmds/delete.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/delete.cc mkdir -p passes/cmds/ gcc -o passes/cmds/design.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/design.cc mkdir -p passes/cmds/ gcc -o passes/cmds/select.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/select.cc mkdir -p passes/cmds/ gcc -o passes/cmds/show.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/show.cc mkdir -p passes/cmds/ gcc -o passes/cmds/rename.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/rename.cc mkdir -p passes/cmds/ gcc -o passes/cmds/autoname.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/autoname.cc mkdir -p passes/cmds/ gcc -o passes/cmds/connect.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/connect.cc mkdir -p passes/cmds/ gcc -o passes/cmds/scatter.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/scatter.cc mkdir -p passes/cmds/ gcc -o passes/cmds/setundef.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/setundef.cc mkdir -p passes/cmds/ gcc -o passes/cmds/splitnets.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/splitnets.cc mkdir -p passes/cmds/ gcc -o passes/cmds/stat.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/stat.cc mkdir -p passes/cmds/ gcc -o passes/cmds/setattr.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/setattr.cc mkdir -p passes/cmds/ gcc -o passes/cmds/copy.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/copy.cc mkdir -p passes/cmds/ gcc -o passes/cmds/splice.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/splice.cc mkdir -p passes/cmds/ gcc -o passes/cmds/scc.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/scc.cc mkdir -p passes/cmds/ gcc -o passes/cmds/torder.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/torder.cc mkdir -p passes/cmds/ gcc -o passes/cmds/logcmd.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/logcmd.cc mkdir -p passes/cmds/ gcc -o passes/cmds/tee.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/tee.cc mkdir -p passes/cmds/ gcc -o passes/cmds/write_file.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/write_file.cc mkdir -p passes/cmds/ gcc -o passes/cmds/connwrappers.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/connwrappers.cc mkdir -p passes/cmds/ gcc -o passes/cmds/cover.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/cover.cc mkdir -p passes/cmds/ gcc -o passes/cmds/trace.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/trace.cc mkdir -p passes/cmds/ gcc -o passes/cmds/plugin.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/plugin.cc mkdir -p passes/cmds/ gcc -o passes/cmds/check.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/check.cc mkdir -p passes/cmds/ gcc -o passes/cmds/qwp.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/qwp.cc mkdir -p passes/cmds/ gcc -o passes/cmds/edgetypes.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/edgetypes.cc mkdir -p passes/cmds/ gcc -o passes/cmds/portlist.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/portlist.cc mkdir -p passes/cmds/ gcc -o passes/cmds/chformal.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/chformal.cc mkdir -p passes/cmds/ gcc -o passes/cmds/chtype.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/chtype.cc mkdir -p passes/cmds/ gcc -o passes/cmds/blackbox.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/blackbox.cc mkdir -p passes/cmds/ gcc -o passes/cmds/ltp.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/ltp.cc mkdir -p passes/cmds/ gcc -o passes/cmds/bugpoint.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/bugpoint.cc mkdir -p passes/cmds/ gcc -o passes/cmds/scratchpad.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/scratchpad.cc mkdir -p passes/cmds/ gcc -o passes/cmds/logger.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/logger.cc mkdir -p passes/cmds/ gcc -o passes/cmds/printattrs.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/printattrs.cc mkdir -p passes/cmds/ gcc -o passes/cmds/sta.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/cmds/sta.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_make.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_make.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_miter.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_miter.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_simple.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_simple.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_status.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_status.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_add.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_add.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_remove.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_remove.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_induct.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_induct.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_struct.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_struct.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_purge.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_purge.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_mark.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_mark.cc mkdir -p passes/equiv/ gcc -o passes/equiv/equiv_opt.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/equiv/equiv_opt.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_detect.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_detect.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_extract.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_extract.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_opt.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_opt.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_expand.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_expand.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_recode.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_recode.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_info.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_info.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_export.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_export.cc mkdir -p passes/fsm/ gcc -o passes/fsm/fsm_map.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/fsm/fsm_map.cc mkdir -p passes/hierarchy/ gcc -o passes/hierarchy/hierarchy.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/hierarchy/hierarchy.cc mkdir -p passes/hierarchy/ gcc -o passes/hierarchy/uniquify.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/hierarchy/uniquify.cc mkdir -p passes/hierarchy/ gcc -o passes/hierarchy/submod.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/hierarchy/submod.cc mkdir -p passes/memory/ gcc -o passes/memory/memory.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_dff.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_dff.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_share.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_share.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_collect.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_collect.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_unpack.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_unpack.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_bram.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_bram.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_map.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_map.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_memx.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_memx.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_nordff.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_nordff.cc mkdir -p passes/memory/ gcc -o passes/memory/memory_narrow.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/memory/memory_narrow.cc mkdir -p passes/opt/ gcc -o passes/opt/opt.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_merge.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_merge.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_mem.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_mem_feedback.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem_feedback.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_mem_priority.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem_priority.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_mem_widen.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_mem_widen.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_muxtree.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_muxtree.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_reduce.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_reduce.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_dff.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_dff.cc passes/opt/opt_dff.cc: In member function 'bool {anonymous}::OptDffWorker::run()': passes/opt/opt_dff.cc:560:52: warning: operation on 'ff.Yosys::FfData::has_clk' may be undefined [-Wsequence-point] 560 | ff.has_clk = ff.has_ce = ff.has_clk = false; | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ mkdir -p passes/opt/ gcc -o passes/opt/opt_share.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_share.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_clean.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_clean.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_expr.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_expr.cc mkdir -p passes/opt/ gcc -o passes/opt/share.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/share.cc mkdir -p passes/opt/ gcc -o passes/opt/wreduce.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/wreduce.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_demorgan.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_demorgan.cc mkdir -p passes/opt/ gcc -o passes/opt/rmports.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/rmports.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_lut.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_lut.cc mkdir -p passes/opt/ gcc -o passes/opt/opt_lut_ins.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/opt_lut_ins.cc mkdir -p passes/opt/ gcc -o passes/opt/pmux2shiftx.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/pmux2shiftx.cc mkdir -p passes/opt/ gcc -o passes/opt/muxpack.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/opt/muxpack.cc mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/test_pmgen_pm.h -p test_pmgen passes/pmgen/test_pmgen.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/ice40_dsp_pm.h -p ice40_dsp passes/pmgen/ice40_dsp.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/peepopt_pm.h -p peepopt passes/pmgen/peepopt_shiftmul.pmg passes/pmgen/peepopt_muldiv.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/xilinx_srl_pm.h -p xilinx_srl passes/pmgen/xilinx_srl.pmg mkdir -p passes/pmgen/ gcc -o passes/pmgen/ice40_dsp.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/pmgen/ice40_dsp.cc mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/ice40_wrapcarry_pm.h -p ice40_wrapcarry passes/pmgen/ice40_wrapcarry.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/xilinx_dsp_pm.h -p xilinx_dsp passes/pmgen/xilinx_dsp.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/xilinx_dsp48a_pm.h -p xilinx_dsp48a passes/pmgen/xilinx_dsp48a.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/xilinx_dsp_CREG_pm.h -p xilinx_dsp_CREG passes/pmgen/xilinx_dsp_CREG.pmg mkdir -p passes/pmgen && python3 passes/pmgen/pmgen.py -o passes/pmgen/xilinx_dsp_cascade_pm.h -p xilinx_dsp_cascade passes/pmgen/xilinx_dsp_cascade.pmg mkdir -p passes/pmgen/ gcc -o passes/pmgen/peepopt.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/pmgen/peepopt.cc mkdir -p passes/pmgen/ gcc -o passes/pmgen/xilinx_srl.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/pmgen/xilinx_srl.cc mkdir -p passes/proc/ gcc -o passes/proc/proc.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_prune.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_prune.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_clean.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_clean.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_rmdead.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_rmdead.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_init.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_init.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_arst.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_arst.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_mux.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_mux.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_dlatch.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_dlatch.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_dff.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_dff.cc mkdir -p passes/proc/ gcc -o passes/proc/proc_memwr.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/proc/proc_memwr.cc mkdir -p passes/sat/ gcc -o passes/sat/sat.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/sat.cc mkdir -p passes/sat/ gcc -o passes/sat/freduce.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/freduce.cc mkdir -p passes/sat/ gcc -o passes/sat/eval.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/eval.cc mkdir -p passes/sat/ gcc -o passes/sat/sim.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/sim.cc mkdir -p passes/sat/ gcc -o passes/sat/miter.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/miter.cc mkdir -p passes/sat/ gcc -o passes/sat/expose.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/expose.cc mkdir -p passes/sat/ gcc -o passes/sat/assertpmux.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/assertpmux.cc mkdir -p passes/sat/ gcc -o passes/sat/clk2fflogic.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/clk2fflogic.cc mkdir -p passes/sat/ gcc -o passes/sat/async2sync.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/async2sync.cc mkdir -p passes/sat/ gcc -o passes/sat/supercover.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/supercover.cc mkdir -p passes/sat/ gcc -o passes/sat/fmcombine.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/fmcombine.cc mkdir -p passes/sat/ gcc -o passes/sat/mutate.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/mutate.cc mkdir -p passes/sat/ gcc -o passes/sat/cutpoint.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/cutpoint.cc mkdir -p passes/sat/ gcc -o passes/sat/fminit.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/fminit.cc mkdir -p passes/sat/ gcc -o passes/sat/qbfsat.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/sat/qbfsat.cc mkdir -p passes/techmap/ gcc -o passes/techmap/flatten.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/flatten.cc mkdir -p passes/techmap/ gcc -o passes/techmap/techmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/techmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/simplemap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/simplemap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/dfflibmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/dfflibmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/maccmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/maccmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/libparse.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/libparse.cc mkdir -p passes/techmap/ gcc -o passes/techmap/abc.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DABCEXTERNAL='"/usr/bin/abc"' passes/techmap/abc.cc mkdir -p passes/techmap/ gcc -o passes/techmap/abc9.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DABCEXTERNAL='"/usr/bin/abc"' passes/techmap/abc9.cc mkdir -p passes/techmap/ gcc -o passes/techmap/abc9_exe.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DABCEXTERNAL='"/usr/bin/abc"' passes/techmap/abc9_exe.cc mkdir -p passes/techmap/ gcc -o passes/techmap/abc9_ops.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/abc9_ops.cc mkdir -p passes/techmap/ gcc -o passes/techmap/iopadmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/iopadmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/clkbufmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/clkbufmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/hilomap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/hilomap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/extract.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract.cc mkdir -p passes/techmap/ gcc -o passes/techmap/extract_fa.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_fa.cc mkdir -p passes/techmap/ gcc -o passes/techmap/extract_counter.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_counter.cc passes/techmap/abc.cc: In member function 'virtual void {anonymous}::AbcPass::execute(std::vector >, Yosys::RTLIL::Design*)': passes/techmap/abc.cc:1825:50: warning: 'g_argidx' may be used uninitialized in this function [-Wmaybe-uninitialized] 1825 | cmd_error(args, g_argidx, stringf("Unsupported gate type: %s", g.c_str())); | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ mkdir -p passes/techmap/ gcc -o passes/techmap/extract_reduce.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extract_reduce.cc mkdir -p passes/techmap/ gcc -o passes/techmap/alumacc.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/alumacc.cc mkdir -p passes/techmap/ gcc -o passes/techmap/dffinit.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/dffinit.cc mkdir -p passes/techmap/ gcc -o passes/techmap/pmuxtree.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/pmuxtree.cc mkdir -p passes/techmap/ gcc -o passes/techmap/muxcover.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/muxcover.cc mkdir -p passes/techmap/ gcc -o passes/techmap/aigmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/aigmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/tribuf.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/tribuf.cc mkdir -p passes/techmap/ gcc -o passes/techmap/lut2mux.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/lut2mux.cc mkdir -p passes/techmap/ gcc -o passes/techmap/nlutmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/nlutmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/shregmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/shregmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/deminout.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/deminout.cc mkdir -p passes/techmap/ gcc -o passes/techmap/insbuf.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/insbuf.cc mkdir -p passes/techmap/ gcc -o passes/techmap/attrmvcp.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/attrmvcp.cc mkdir -p passes/techmap/ gcc -o passes/techmap/attrmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/attrmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/zinit.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/zinit.cc mkdir -p passes/techmap/ gcc -o passes/techmap/dfflegalize.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/dfflegalize.cc mkdir -p passes/techmap/ gcc -o passes/techmap/dffunmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/dffunmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/flowmap.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/flowmap.cc mkdir -p passes/techmap/ gcc -o passes/techmap/extractinv.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/extractinv.cc mkdir -p passes/tests/ gcc -o passes/tests/test_autotb.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/tests/test_autotb.cc mkdir -p passes/tests/ gcc -o passes/tests/test_cell.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/tests/test_cell.cc mkdir -p passes/tests/ gcc -o passes/tests/test_abcloop.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/tests/test_abcloop.cc mkdir -p backends/aiger/ gcc -o backends/aiger/aiger.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/aiger/aiger.cc mkdir -p backends/aiger/ gcc -o backends/aiger/xaiger.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/aiger/xaiger.cc mkdir -p backends/blif/ gcc -o backends/blif/blif.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/blif/blif.cc mkdir -p backends/btor/ gcc -o backends/btor/btor.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/btor/btor.cc mkdir -p backends/cxxrtl/ gcc -o backends/cxxrtl/cxxrtl_backend.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/cxxrtl/cxxrtl_backend.cc mkdir -p backends/edif/ gcc -o backends/edif/edif.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/edif/edif.cc mkdir -p backends/firrtl/ gcc -o backends/firrtl/firrtl.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/firrtl/firrtl.cc mkdir -p backends/intersynth/ gcc -o backends/intersynth/intersynth.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/intersynth/intersynth.cc mkdir -p backends/json/ gcc -o backends/json/json.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/json/json.cc mkdir -p backends/rtlil/ gcc -o backends/rtlil/rtlil_backend.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/rtlil/rtlil_backend.cc mkdir -p backends/simplec/ gcc -o backends/simplec/simplec.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/simplec/simplec.cc mkdir -p backends/smt2/ gcc -o backends/smt2/smt2.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/smt2/smt2.cc mkdir -p backends/smv/ gcc -o backends/smv/smv.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/smv/smv.cc mkdir -p backends/spice/ gcc -o backends/spice/spice.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/spice/spice.cc mkdir -p backends/table/ gcc -o backends/table/table.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/table/table.cc mkdir -p backends/verilog/ gcc -o backends/verilog/verilog_backend.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER backends/verilog/verilog_backend.cc mkdir -p techlibs/achronix/ gcc -o techlibs/achronix/synth_achronix.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/achronix/synth_achronix.cc mkdir -p techlibs/anlogic/ gcc -o techlibs/anlogic/synth_anlogic.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/anlogic/synth_anlogic.cc mkdir -p techlibs/anlogic/ gcc -o techlibs/anlogic/anlogic_eqn.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/anlogic/anlogic_eqn.cc mkdir -p techlibs/anlogic/ gcc -o techlibs/anlogic/anlogic_fixcarry.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/anlogic/anlogic_fixcarry.cc mkdir -p techlibs/common/ gcc -o techlibs/common/synth.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/common/synth.cc mkdir -p techlibs/common/ gcc -o techlibs/common/prep.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/common/prep.cc mkdir -p techlibs/coolrunner2/ gcc -o techlibs/coolrunner2/synth_coolrunner2.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/coolrunner2/synth_coolrunner2.cc mkdir -p techlibs/coolrunner2/ gcc -o techlibs/coolrunner2/coolrunner2_sop.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/coolrunner2/coolrunner2_sop.cc mkdir -p techlibs/coolrunner2/ gcc -o techlibs/coolrunner2/coolrunner2_fixup.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/coolrunner2/coolrunner2_fixup.cc mkdir -p techlibs/easic/ gcc -o techlibs/easic/synth_easic.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/easic/synth_easic.cc mkdir -p techlibs/ecp5/ gcc -o techlibs/ecp5/synth_ecp5.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/ecp5/synth_ecp5.cc mkdir -p techlibs/ecp5/ gcc -o techlibs/ecp5/ecp5_gsr.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/ecp5/ecp5_gsr.cc mkdir -p techlibs/efinix/ gcc -o techlibs/efinix/synth_efinix.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/efinix/synth_efinix.cc mkdir -p techlibs/efinix/ gcc -o techlibs/efinix/efinix_fixcarry.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/efinix/efinix_fixcarry.cc mkdir -p techlibs/gatemate/ gcc -o techlibs/gatemate/synth_gatemate.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/gatemate/synth_gatemate.cc mkdir -p techlibs/gowin/ gcc -o techlibs/gowin/synth_gowin.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/gowin/synth_gowin.cc mkdir -p techlibs/greenpak4/ gcc -o techlibs/greenpak4/synth_greenpak4.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/greenpak4/synth_greenpak4.cc mkdir -p techlibs/greenpak4/ gcc -o techlibs/greenpak4/greenpak4_dffinv.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/greenpak4/greenpak4_dffinv.cc mkdir -p techlibs/ice40/ gcc -o techlibs/ice40/synth_ice40.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/ice40/synth_ice40.cc mkdir -p techlibs/ice40/ gcc -o techlibs/ice40/ice40_braminit.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/ice40/ice40_braminit.cc mkdir -p techlibs/ice40/ gcc -o techlibs/ice40/ice40_opt.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/ice40/ice40_opt.cc mkdir -p techlibs/intel/ gcc -o techlibs/intel/synth_intel.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/intel/synth_intel.cc mkdir -p techlibs/intel_alm/ gcc -o techlibs/intel_alm/synth_intel_alm.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/intel_alm/synth_intel_alm.cc mkdir -p techlibs/machxo2/ gcc -o techlibs/machxo2/synth_machxo2.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/machxo2/synth_machxo2.cc mkdir -p techlibs/nexus/ gcc -o techlibs/nexus/synth_nexus.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/nexus/synth_nexus.cc mkdir -p techlibs/quicklogic/ gcc -o techlibs/quicklogic/synth_quicklogic.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/quicklogic/synth_quicklogic.cc mkdir -p techlibs/sf2/ gcc -o techlibs/sf2/synth_sf2.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/sf2/synth_sf2.cc mkdir -p techlibs/xilinx/ gcc -o techlibs/xilinx/synth_xilinx.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/xilinx/synth_xilinx.cc mkdir -p techlibs/xilinx/ gcc -o techlibs/xilinx/xilinx_dffopt.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER techlibs/xilinx/xilinx_dffopt.cc sed -e 's#@CXXFLAGS@#-O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I"/usr/include/yosys" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER#;' \ -e 's#@CXX@#gcc#;' -e 's#@LDFLAGS@#-Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -rdynamic#;' -e 's#@LDLIBS@#-lstdc++ -lm -lrt -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6#;' \ -e 's#@BINDIR@#/usr/bin#;' -e 's#@DATDIR@#/usr/share/yosys#;' < misc/yosys-config.in > yosys-config chmod +x yosys-config mkdir -p passes/techmap/ gcc -o passes/techmap/filterlib.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/techmap/filterlib.cc sed 's|##yosys-sys-path##|sys.path += [os.path.dirname(os.path.realpath(__file__)) + p for p in ["/share/python3", "/../share/yosys/python3"]]|;' < backends/smt2/smtbmc.py > yosys-smtbmc.new chmod +x yosys-smtbmc.new mv yosys-smtbmc.new yosys-smtbmc mkdir -p share/include/kernel/ cp "./"/kernel/yosys.h share/include/kernel/yosys.h mkdir -p share/include/kernel/ cp "./"/kernel/hashlib.h share/include/kernel/hashlib.h mkdir -p share/include/kernel/ cp "./"/kernel/log.h share/include/kernel/log.h mkdir -p share/include/kernel/ cp "./"/kernel/rtlil.h share/include/kernel/rtlil.h mkdir -p share/include/kernel/ cp "./"/kernel/binding.h share/include/kernel/binding.h mkdir -p share/include/kernel/ cp "./"/kernel/register.h share/include/kernel/register.h mkdir -p share/include/kernel/ cp "./"/kernel/celltypes.h share/include/kernel/celltypes.h mkdir -p share/include/kernel/ cp "./"/kernel/celledges.h share/include/kernel/celledges.h mkdir -p share/include/kernel/ cp "./"/kernel/consteval.h share/include/kernel/consteval.h mkdir -p share/include/kernel/ cp "./"/kernel/constids.inc share/include/kernel/constids.inc mkdir -p share/include/kernel/ cp "./"/kernel/sigtools.h share/include/kernel/sigtools.h mkdir -p share/include/kernel/ cp "./"/kernel/modtools.h share/include/kernel/modtools.h mkdir -p share/include/kernel/ cp "./"/kernel/macc.h share/include/kernel/macc.h mkdir -p share/include/kernel/ cp "./"/kernel/utils.h share/include/kernel/utils.h mkdir -p share/include/kernel/ cp "./"/kernel/satgen.h share/include/kernel/satgen.h mkdir -p share/include/kernel/ cp "./"/kernel/qcsat.h share/include/kernel/qcsat.h mkdir -p share/include/kernel/ cp "./"/kernel/ff.h share/include/kernel/ff.h mkdir -p share/include/kernel/ cp "./"/kernel/ffinit.h share/include/kernel/ffinit.h mkdir -p share/include/kernel/ cp "./"/kernel/mem.h share/include/kernel/mem.h mkdir -p share/include/libs/ezsat/ cp "./"/libs/ezsat/ezsat.h share/include/libs/ezsat/ezsat.h mkdir -p share/include/libs/ezsat/ cp "./"/libs/ezsat/ezminisat.h share/include/libs/ezsat/ezminisat.h mkdir -p share/include/libs/sha1/ cp "./"/libs/sha1/sha1.h share/include/libs/sha1/sha1.h mkdir -p share/include/libs/json11/ cp "./"/libs/json11/json11.hpp share/include/libs/json11/json11.hpp mkdir -p share/include/passes/fsm/ cp "./"/passes/fsm/fsmdata.h share/include/passes/fsm/fsmdata.h mkdir -p share/include/frontends/ast/ cp "./"/frontends/ast/ast.h share/include/frontends/ast/ast.h mkdir -p share/include/frontends/ast/ cp "./"/frontends/ast/ast_binding.h share/include/frontends/ast/ast_binding.h mkdir -p share/include/frontends/blif/ cp "./"/frontends/blif/blifparse.h share/include/frontends/blif/blifparse.h mkdir -p share/include/backends/rtlil/ cp "./"/backends/rtlil/rtlil_backend.h share/include/backends/rtlil/rtlil_backend.h mkdir -p share/include/backends/cxxrtl/ cp "./"/backends/cxxrtl/cxxrtl.h share/include/backends/cxxrtl/cxxrtl.h mkdir -p share/include/backends/cxxrtl/ cp "./"/backends/cxxrtl/cxxrtl_vcd.h share/include/backends/cxxrtl/cxxrtl_vcd.h mkdir -p share/include/backends/cxxrtl/ cp "./"/backends/cxxrtl/cxxrtl_capi.cc share/include/backends/cxxrtl/cxxrtl_capi.cc mkdir -p share/include/backends/cxxrtl/ cp "./"/backends/cxxrtl/cxxrtl_capi.h share/include/backends/cxxrtl/cxxrtl_capi.h mkdir -p share/include/backends/cxxrtl/ cp "./"/backends/cxxrtl/cxxrtl_vcd_capi.cc share/include/backends/cxxrtl/cxxrtl_vcd_capi.cc mkdir -p share/include/backends/cxxrtl/ cp "./"/backends/cxxrtl/cxxrtl_vcd_capi.h share/include/backends/cxxrtl/cxxrtl_vcd_capi.h mkdir -p share/python3 cp "./"/backends/smt2/smtio.py share/python3/smtio.py mkdir -p share/achronix/speedster22i/ cp "./"/techlibs/achronix/speedster22i/cells_sim.v share/achronix/speedster22i/cells_sim.v mkdir -p share/achronix/speedster22i/ cp "./"/techlibs/achronix/speedster22i/cells_map.v share/achronix/speedster22i/cells_map.v mkdir -p share/anlogic cp "./"/techlibs/anlogic/cells_map.v share/anlogic/cells_map.v mkdir -p share/anlogic cp "./"/techlibs/anlogic/arith_map.v share/anlogic/arith_map.v mkdir -p share/anlogic cp "./"/techlibs/anlogic/cells_sim.v share/anlogic/cells_sim.v mkdir -p share/anlogic cp "./"/techlibs/anlogic/eagle_bb.v share/anlogic/eagle_bb.v mkdir -p share/anlogic cp "./"/techlibs/anlogic/lutrams.txt share/anlogic/lutrams.txt mkdir -p share/anlogic cp "./"/techlibs/anlogic/lutrams_map.v share/anlogic/lutrams_map.v mkdir -p share/anlogic cp "./"/techlibs/anlogic/lutram_init_16x4.vh share/anlogic/lutram_init_16x4.vh mkdir -p share cp "./"/techlibs/common/simlib.v share/simlib.v mkdir -p share cp "./"/techlibs/common/simcells.v share/simcells.v mkdir -p share cp "./"/techlibs/common/techmap.v share/techmap.v mkdir -p share cp "./"/techlibs/common/pmux2mux.v share/pmux2mux.v mkdir -p share cp "./"/techlibs/common/adff2dff.v share/adff2dff.v mkdir -p share cp "./"/techlibs/common/dff2ff.v share/dff2ff.v mkdir -p share cp "./"/techlibs/common/gate2lut.v share/gate2lut.v mkdir -p share cp "./"/techlibs/common/cmp2lut.v share/cmp2lut.v mkdir -p share cp "./"/techlibs/common/cells.lib share/cells.lib mkdir -p share cp "./"/techlibs/common/mul2dsp.v share/mul2dsp.v mkdir -p share cp "./"/techlibs/common/abc9_model.v share/abc9_model.v mkdir -p share mkdir -p share cp "./"/techlibs/common/abc9_map.v share/abc9_map.v cp "./"/techlibs/common/abc9_unmap.v share/abc9_unmap.v mkdir -p share mkdir -p share/coolrunner2 cp "./"/techlibs/common/cmp2lcu.v share/cmp2lcu.v cp "./"/techlibs/coolrunner2/cells_latch.v share/coolrunner2/cells_latch.v mkdir -p share/coolrunner2 mkdir -p share/coolrunner2 cp "./"/techlibs/coolrunner2/cells_sim.v share/coolrunner2/cells_sim.v cp "./"/techlibs/coolrunner2/cells_counter_map.v share/coolrunner2/cells_counter_map.v mkdir -p share/coolrunner2 mkdir -p share/coolrunner2 cp "./"/techlibs/coolrunner2/tff_extract.v share/coolrunner2/tff_extract.v cp "./"/techlibs/coolrunner2/xc2_dff.lib share/coolrunner2/xc2_dff.lib mkdir -p share/ecp5 mkdir -p share/ecp5 cp "./"/techlibs/ecp5/cells_ff.vh share/ecp5/cells_ff.vh cp "./"/techlibs/ecp5/cells_io.vh share/ecp5/cells_io.vh mkdir -p share/ecp5 mkdir -p share/ecp5 cp "./"/techlibs/ecp5/cells_map.v share/ecp5/cells_map.v cp "./"/techlibs/ecp5/cells_sim.v share/ecp5/cells_sim.v mkdir -p share/ecp5 mkdir -p share/ecp5 cp "./"/techlibs/ecp5/cells_bb.v share/ecp5/cells_bb.v cp "./"/techlibs/ecp5/lutrams_map.v share/ecp5/lutrams_map.v mkdir -p share/ecp5 mkdir -p share/ecp5 cp "./"/techlibs/ecp5/lutrams.txt share/ecp5/lutrams.txt cp "./"/techlibs/ecp5/brams_map.v share/ecp5/brams_map.v mkdir -p share/ecp5 mkdir -p share/ecp5 cp "./"/techlibs/ecp5/brams.txt share/ecp5/brams.txt cp "./"/techlibs/ecp5/arith_map.v share/ecp5/arith_map.v mkdir -p share/ecp5 mkdir -p share/ecp5 cp "./"/techlibs/ecp5/latches_map.v share/ecp5/latches_map.v cp "./"/techlibs/ecp5/dsp_map.v share/ecp5/dsp_map.v mkdir -p techlibs/ecp5 mkdir -p techlibs/ecp5 python3 techlibs/ecp5/brams_init.py python3 techlibs/ecp5/brams_connect.py touch techlibs/ecp5/brams_init.mk mkdir -p share/efinix cp "./"/techlibs/efinix/cells_map.v share/efinix/cells_map.v mkdir -p share/efinix cp "./"/techlibs/efinix/arith_map.v share/efinix/arith_map.v touch techlibs/ecp5/brams_connect.mk mkdir -p share/efinix mkdir -p share/efinix cp "./"/techlibs/efinix/cells_sim.v share/efinix/cells_sim.v cp "./"/techlibs/efinix/brams_map.v share/efinix/brams_map.v mkdir -p share/efinix mkdir -p share/efinix cp "./"/techlibs/efinix/brams.txt share/efinix/brams.txt cp "./"/techlibs/efinix/gbuf_map.v share/efinix/gbuf_map.v mkdir -p share/gatemate mkdir -p share/gatemate cp "./"/techlibs/gatemate/reg_map.v share/gatemate/reg_map.v cp "./"/techlibs/gatemate/mux_map.v share/gatemate/mux_map.v mkdir -p share/gatemate mkdir -p share/gatemate cp "./"/techlibs/gatemate/lut_map.v share/gatemate/lut_map.v cp "./"/techlibs/gatemate/mul_map.v share/gatemate/mul_map.v mkdir -p share/gatemate mkdir -p share/gatemate cp "./"/techlibs/gatemate/arith_map.v share/gatemate/arith_map.v cp "./"/techlibs/gatemate/cells_sim.v share/gatemate/cells_sim.v mkdir -p share/gatemate mkdir -p share/gatemate cp "./"/techlibs/gatemate/cells_bb.v share/gatemate/cells_bb.v cp "./"/techlibs/gatemate/brams_map.v share/gatemate/brams_map.v mkdir -p share/gatemate mkdir -p share/gatemate cp "./"/techlibs/gatemate/brams.txt share/gatemate/brams.txt cp "./"/techlibs/gatemate/brams_init_20.vh share/gatemate/brams_init_20.vh mkdir -p share/gatemate mkdir -p share/gowin cp "./"/techlibs/gatemate/brams_init_40.vh share/gatemate/brams_init_40.vh cp "./"/techlibs/gowin/cells_map.v share/gowin/cells_map.v mkdir -p share/gowin mkdir -p share/gowin cp "./"/techlibs/gowin/cells_sim.v share/gowin/cells_sim.v cp "./"/techlibs/gowin/arith_map.v share/gowin/arith_map.v mkdir -p share/gowin mkdir -p share/gowin cp "./"/techlibs/gowin/brams_map.v share/gowin/brams_map.v cp "./"/techlibs/gowin/brams.txt share/gowin/brams.txt mkdir -p share/gowin mkdir -p share/gowin cp "./"/techlibs/gowin/lutrams_map.v share/gowin/lutrams_map.v cp "./"/techlibs/gowin/lutrams.txt share/gowin/lutrams.txt mkdir -p share/gowin mkdir -p techlibs/gowin cp "./"/techlibs/gowin/brams_init3.vh share/gowin/brams_init3.vh python3 techlibs/gowin/brams_init.py mkdir -p share/greenpak4 cp "./"/techlibs/greenpak4/cells_blackbox.v share/greenpak4/cells_blackbox.v mkdir -p share/greenpak4 touch techlibs/gowin/brams_init.mk cp "./"/techlibs/greenpak4/cells_latch.v share/greenpak4/cells_latch.v mkdir -p share/greenpak4 mkdir -p share/greenpak4 cp "./"/techlibs/greenpak4/cells_map.v share/greenpak4/cells_map.v cp "./"/techlibs/greenpak4/cells_sim.v share/greenpak4/cells_sim.v mkdir -p share/greenpak4 mkdir -p share/greenpak4 cp "./"/techlibs/greenpak4/cells_sim_ams.v share/greenpak4/cells_sim_ams.v cp "./"/techlibs/greenpak4/cells_sim_digital.v share/greenpak4/cells_sim_digital.v mkdir -p share/greenpak4 mkdir -p share/greenpak4 cp "./"/techlibs/greenpak4/cells_sim_wip.v share/greenpak4/cells_sim_wip.v cp "./"/techlibs/greenpak4/gp_dff.lib share/greenpak4/gp_dff.lib mkdir -p share/ice40 mkdir -p share/ice40 cp "./"/techlibs/ice40/arith_map.v share/ice40/arith_map.v cp "./"/techlibs/ice40/cells_map.v share/ice40/cells_map.v mkdir -p share/ice40 mkdir -p share/ice40 cp "./"/techlibs/ice40/ff_map.v share/ice40/ff_map.v cp "./"/techlibs/ice40/cells_sim.v share/ice40/cells_sim.v mkdir -p share/ice40 mkdir -p share/ice40 cp "./"/techlibs/ice40/latches_map.v share/ice40/latches_map.v cp "./"/techlibs/ice40/brams.txt share/ice40/brams.txt mkdir -p share/ice40 mkdir -p share/ice40 cp "./"/techlibs/ice40/brams_map.v share/ice40/brams_map.v cp "./"/techlibs/ice40/dsp_map.v share/ice40/dsp_map.v mkdir -p share/ice40 mkdir -p techlibs/ice40 cp "./"/techlibs/ice40/abc9_model.v share/ice40/abc9_model.v python3 techlibs/ice40/brams_init.py mkdir -p share/intel/common cp "./"/techlibs/intel/common/m9k_bb.v share/intel/common/m9k_bb.v mkdir -p share/intel/common cp "./"/techlibs/intel/common/altpll_bb.v share/intel/common/altpll_bb.v mkdir -p share/intel/common cp "./"/techlibs/intel/common/brams_m9k.txt share/intel/common/brams_m9k.txt mkdir -p share/intel/common cp "./"/techlibs/intel/common/brams_map_m9k.v share/intel/common/brams_map_m9k.v mkdir -p share/intel/common cp "./"/techlibs/intel/common/ff_map.v share/intel/common/ff_map.v touch techlibs/ice40/brams_init.mk mkdir -p share/intel/max10 mkdir -p share/intel/cyclone10lp cp "./"/techlibs/intel/max10/cells_sim.v share/intel/max10/cells_sim.v cp "./"/techlibs/intel/cyclone10lp/cells_sim.v share/intel/cyclone10lp/cells_sim.v mkdir -p share/intel/cycloneiv mkdir -p share/intel/cycloneive cp "./"/techlibs/intel/cycloneiv/cells_sim.v share/intel/cycloneiv/cells_sim.v cp "./"/techlibs/intel/cycloneive/cells_sim.v share/intel/cycloneive/cells_sim.v mkdir -p share/intel/max10 mkdir -p share/intel/cyclone10lp cp "./"/techlibs/intel/max10/cells_map.v share/intel/max10/cells_map.v cp "./"/techlibs/intel/cyclone10lp/cells_map.v share/intel/cyclone10lp/cells_map.v mkdir -p share/intel/cycloneiv mkdir -p share/intel/cycloneive cp "./"/techlibs/intel/cycloneiv/cells_map.v share/intel/cycloneiv/cells_map.v cp "./"/techlibs/intel/cycloneive/cells_map.v share/intel/cycloneive/cells_map.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/abc9_map.v share/intel_alm/common/abc9_map.v cp "./"/techlibs/intel_alm/common/abc9_unmap.v share/intel_alm/common/abc9_unmap.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/abc9_model.v share/intel_alm/common/abc9_model.v cp "./"/techlibs/intel_alm/common/alm_map.v share/intel_alm/common/alm_map.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/alm_sim.v share/intel_alm/common/alm_sim.v cp "./"/techlibs/intel_alm/common/arith_alm_map.v share/intel_alm/common/arith_alm_map.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/dff_map.v share/intel_alm/common/dff_map.v cp "./"/techlibs/intel_alm/common/dff_sim.v share/intel_alm/common/dff_sim.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/dsp_sim.v share/intel_alm/common/dsp_sim.v cp "./"/techlibs/intel_alm/common/dsp_map.v share/intel_alm/common/dsp_map.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/mem_sim.v share/intel_alm/common/mem_sim.v cp "./"/techlibs/intel_alm/common/misc_sim.v share/intel_alm/common/misc_sim.v mkdir -p share/intel_alm/cyclonev mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/cyclonev/cells_sim.v share/intel_alm/cyclonev/cells_sim.v cp "./"/techlibs/intel_alm/common/bram_m10k.txt share/intel_alm/common/bram_m10k.txt mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/bram_m20k.txt share/intel_alm/common/bram_m20k.txt cp "./"/techlibs/intel_alm/common/bram_m20k_map.v share/intel_alm/common/bram_m20k_map.v mkdir -p share/intel_alm/common mkdir -p share/intel_alm/common cp "./"/techlibs/intel_alm/common/lutram_mlab.txt share/intel_alm/common/lutram_mlab.txt cp "./"/techlibs/intel_alm/common/megafunction_bb.v share/intel_alm/common/megafunction_bb.v mkdir -p share/intel_alm/common mkdir -p share/machxo2 cp "./"/techlibs/intel_alm/common/quartus_rename.v share/intel_alm/common/quartus_rename.v cp "./"/techlibs/machxo2/cells_map.v share/machxo2/cells_map.v mkdir -p share/machxo2 cp "./"/techlibs/machxo2/cells_sim.v share/machxo2/cells_sim.v mkdir -p share/nexus cp "./"/techlibs/nexus/cells_map.v share/nexus/cells_map.v mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/cells_sim.v share/nexus/cells_sim.v cp "./"/techlibs/nexus/parse_init.vh share/nexus/parse_init.vh mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/lutrams_map.v share/nexus/lutrams_map.v cp "./"/techlibs/nexus/cells_xtra.v share/nexus/cells_xtra.v mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/lutrams.txt share/nexus/lutrams.txt cp "./"/techlibs/nexus/brams_init.vh share/nexus/brams_init.vh mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/brams_map.v share/nexus/brams_map.v cp "./"/techlibs/nexus/brams.txt share/nexus/brams.txt mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/lrams_init.vh share/nexus/lrams_init.vh cp "./"/techlibs/nexus/lrams_map.v share/nexus/lrams_map.v mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/lrams.txt share/nexus/lrams.txt cp "./"/techlibs/nexus/arith_map.v share/nexus/arith_map.v mkdir -p share/nexus mkdir -p share/nexus cp "./"/techlibs/nexus/latches_map.v share/nexus/latches_map.v cp "./"/techlibs/nexus/dsp_map.v share/nexus/dsp_map.v mkdir -p share/quicklogic mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/pp3_ffs_map.v share/quicklogic/pp3_ffs_map.v cp "./"/techlibs/quicklogic/pp3_lut_map.v share/quicklogic/pp3_lut_map.v mkdir -p share/quicklogic mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/pp3_latches_map.v share/quicklogic/pp3_latches_map.v cp "./"/techlibs/quicklogic/pp3_cells_map.v share/quicklogic/pp3_cells_map.v mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/cells_sim.v share/quicklogic/cells_sim.v mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/lut_sim.v share/quicklogic/lut_sim.v mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/pp3_cells_sim.v share/quicklogic/pp3_cells_sim.v mkdir -p share/quicklogic mkdir -p share/quicklogic cp "./"/techlibs/quicklogic/abc9_model.v share/quicklogic/abc9_model.v cp "./"/techlibs/quicklogic/abc9_map.v share/quicklogic/abc9_map.v mkdir -p share/quicklogic mkdir -p share/sf2 cp "./"/techlibs/quicklogic/abc9_unmap.v share/quicklogic/abc9_unmap.v cp "./"/techlibs/sf2/arith_map.v share/sf2/arith_map.v mkdir -p share/sf2 cp "./"/techlibs/sf2/cells_map.v share/sf2/cells_map.v mkdir -p share/sf2 cp "./"/techlibs/sf2/cells_sim.v share/sf2/cells_sim.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/cells_map.v share/xilinx/cells_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/cells_sim.v share/xilinx/cells_sim.v cp "./"/techlibs/xilinx/cells_xtra.v share/xilinx/cells_xtra.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc2v_brams.txt share/xilinx/xc2v_brams.txt cp "./"/techlibs/xilinx/xc2v_brams_map.v share/xilinx/xc2v_brams_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc3sa_brams.txt share/xilinx/xc3sa_brams.txt cp "./"/techlibs/xilinx/xc3sda_brams.txt share/xilinx/xc3sda_brams.txt mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc6s_brams.txt share/xilinx/xc6s_brams.txt cp "./"/techlibs/xilinx/xc6s_brams_map.v share/xilinx/xc6s_brams_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc7_xcu_brams.txt share/xilinx/xc7_xcu_brams.txt mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc7_brams_map.v share/xilinx/xc7_brams_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xcu_brams_map.v share/xilinx/xcu_brams_map.v cp "./"/techlibs/xilinx/xcup_urams.txt share/xilinx/xcup_urams.txt mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xcup_urams_map.v share/xilinx/xcup_urams_map.v cp "./"/techlibs/xilinx/lut4_lutrams.txt share/xilinx/lut4_lutrams.txt mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/lut6_lutrams.txt share/xilinx/lut6_lutrams.txt cp "./"/techlibs/xilinx/lutrams_map.v share/xilinx/lutrams_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/arith_map.v share/xilinx/arith_map.v cp "./"/techlibs/xilinx/ff_map.v share/xilinx/ff_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/lut_map.v share/xilinx/lut_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/mux_map.v share/xilinx/mux_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc3s_mult_map.v share/xilinx/xc3s_mult_map.v cp "./"/techlibs/xilinx/xc3sda_dsp_map.v share/xilinx/xc3sda_dsp_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc6s_dsp_map.v share/xilinx/xc6s_dsp_map.v cp "./"/techlibs/xilinx/xc4v_dsp_map.v share/xilinx/xc4v_dsp_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc5v_dsp_map.v share/xilinx/xc5v_dsp_map.v mkdir -p share/xilinx cp "./"/techlibs/xilinx/xc7_dsp_map.v share/xilinx/xc7_dsp_map.v mkdir -p share/xilinx mkdir -p share/xilinx cp "./"/techlibs/xilinx/xcu_dsp_map.v share/xilinx/xcu_dsp_map.v cp "./"/techlibs/xilinx/abc9_model.v share/xilinx/abc9_model.v mkdir -p techlibs/xilinx mkdir -p kernel/ python3 techlibs/xilinx/brams_init.py gcc -o kernel/version_UNKNOWN.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/version_UNKNOWN.cc mkdir -p kernel/ gcc -o kernel/register.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER kernel/register.cc touch techlibs/xilinx/brams_init.mk mkdir -p frontends/rtlil/ gcc -o frontends/rtlil/rtlil_parser.tab.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/rtlil/rtlil_parser.tab.cc mkdir -p frontends/rtlil/ gcc -o frontends/rtlil/rtlil_lexer.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/rtlil/rtlil_lexer.cc mkdir -p frontends/verilog/ gcc -o frontends/verilog/verilog_parser.tab.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -DYYMAXDEPTH=10000000 frontends/verilog/verilog_parser.tab.cc mkdir -p frontends/verilog/ flex -o frontends/verilog/verilog_lexer.cc frontends/verilog/verilog_lexer.l mkdir -p passes/pmgen/ gcc -o passes/pmgen/test_pmgen.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/pmgen/test_pmgen.cc mkdir -p passes/pmgen/ gcc -o passes/pmgen/ice40_wrapcarry.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/pmgen/ice40_wrapcarry.cc mkdir -p passes/pmgen/ gcc -o passes/pmgen/xilinx_dsp.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER passes/pmgen/xilinx_dsp.cc mkdir -p ./ gcc -o yosys-filterlib -Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -rdynamic passes/techmap/filterlib.o -lstdc++ -lm -lrt -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 mkdir -p share/ecp5 cp techlibs/ecp5/bram_init_1_2_4.vh share/ecp5/bram_init_1_2_4.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_init_9_18_36.vh share/ecp5/bram_init_9_18_36.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_conn_1.vh share/ecp5/bram_conn_1.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_conn_2.vh share/ecp5/bram_conn_2.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_conn_4.vh share/ecp5/bram_conn_4.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_conn_9.vh share/ecp5/bram_conn_9.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_conn_18.vh share/ecp5/bram_conn_18.vh mkdir -p share/ecp5 cp techlibs/ecp5/bram_conn_36.vh share/ecp5/bram_conn_36.vh mkdir -p share/gowin cp techlibs/gowin/bram_init_16.vh share/gowin/bram_init_16.vh mkdir -p share/ice40 cp techlibs/ice40/brams_init1.vh share/ice40/brams_init1.vh mkdir -p share/ice40 cp techlibs/ice40/brams_init2.vh share/ice40/brams_init2.vh mkdir -p share/ice40 cp techlibs/ice40/brams_init3.vh share/ice40/brams_init3.vh mkdir -p share/xilinx cp techlibs/xilinx/brams_init_36.vh share/xilinx/brams_init_36.vh mkdir -p share/xilinx cp techlibs/xilinx/brams_init_32.vh share/xilinx/brams_init_32.vh mkdir -p share/xilinx cp techlibs/xilinx/brams_init_18.vh share/xilinx/brams_init_18.vh mkdir -p share/xilinx cp techlibs/xilinx/brams_init_16.vh share/xilinx/brams_init_16.vh mkdir -p share/xilinx cp techlibs/xilinx/brams_init_9.vh share/xilinx/brams_init_9.vh mkdir -p share/xilinx cp techlibs/xilinx/brams_init_8.vh share/xilinx/brams_init_8.vh mkdir -p frontends/verilog/ gcc -o frontends/verilog/verilog_lexer.o -c -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I. -I"./" -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER frontends/verilog/verilog_lexer.cc gcc -o yosys -Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -rdynamic kernel/version_UNKNOWN.o kernel/driver.o kernel/register.o kernel/rtlil.o kernel/log.o kernel/calc.o kernel/yosys.o kernel/binding.o kernel/cellaigs.o kernel/celledges.o kernel/satgen.o kernel/qcsat.o kernel/mem.o kernel/ffmerge.o kernel/ff.o libs/bigint/BigIntegerAlgorithms.o libs/bigint/BigInteger.o libs/bigint/BigIntegerUtils.o libs/bigint/BigUnsigned.o libs/bigint/BigUnsignedInABase.o libs/sha1/sha1.o libs/json11/json11.o libs/subcircuit/subcircuit.o libs/ezsat/ezsat.o libs/ezsat/ezminisat.o libs/minisat/Options.o libs/minisat/SimpSolver.o libs/minisat/Solver.o libs/minisat/System.o frontends/aiger/aigerparse.o frontends/ast/ast.o frontends/ast/simplify.o frontends/ast/genrtlil.o frontends/ast/dpicall.o frontends/ast/ast_binding.o frontends/blif/blifparse.o frontends/json/jsonparse.o frontends/liberty/liberty.o frontends/rpc/rpc_frontend.o frontends/rtlil/rtlil_parser.tab.o frontends/rtlil/rtlil_lexer.o frontends/rtlil/rtlil_frontend.o frontends/verific/verific.o frontends/verilog/verilog_parser.tab.o frontends/verilog/verilog_lexer.o frontends/verilog/preproc.o frontends/verilog/verilog_frontend.o frontends/verilog/const2ast.o passes/cmds/exec.o passes/cmds/add.o passes/cmds/delete.o passes/cmds/design.o passes/cmds/select.o passes/cmds/show.o passes/cmds/rename.o passes/cmds/autoname.o passes/cmds/connect.o passes/cmds/scatter.o passes/cmds/setundef.o passes/cmds/splitnets.o passes/cmds/stat.o passes/cmds/setattr.o passes/cmds/copy.o passes/cmds/splice.o passes/cmds/scc.o passes/cmds/torder.o passes/cmds/logcmd.o passes/cmds/tee.o passes/cmds/write_file.o passes/cmds/connwrappers.o passes/cmds/cover.o passes/cmds/trace.o passes/cmds/plugin.o passes/cmds/check.o passes/cmds/qwp.o passes/cmds/edgetypes.o passes/cmds/portlist.o passes/cmds/chformal.o passes/cmds/chtype.o passes/cmds/blackbox.o passes/cmds/ltp.o passes/cmds/bugpoint.o passes/cmds/scratchpad.o passes/cmds/logger.o passes/cmds/printattrs.o passes/cmds/sta.o passes/equiv/equiv_make.o passes/equiv/equiv_miter.o passes/equiv/equiv_simple.o passes/equiv/equiv_status.o passes/equiv/equiv_add.o passes/equiv/equiv_remove.o passes/equiv/equiv_induct.o passes/equiv/equiv_struct.o passes/equiv/equiv_purge.o passes/equiv/equiv_mark.o passes/equiv/equiv_opt.o passes/fsm/fsm.o passes/fsm/fsm_detect.o passes/fsm/fsm_extract.o passes/fsm/fsm_opt.o passes/fsm/fsm_expand.o passes/fsm/fsm_recode.o passes/fsm/fsm_info.o passes/fsm/fsm_export.o passes/fsm/fsm_map.o passes/hierarchy/hierarchy.o passes/hierarchy/uniquify.o passes/hierarchy/submod.o passes/memory/memory.o passes/memory/memory_dff.o passes/memory/memory_share.o passes/memory/memory_collect.o passes/memory/memory_unpack.o passes/memory/memory_bram.o passes/memory/memory_map.o passes/memory/memory_memx.o passes/memory/memory_nordff.o passes/memory/memory_narrow.o passes/opt/opt.o passes/opt/opt_merge.o passes/opt/opt_mem.o passes/opt/opt_mem_feedback.o passes/opt/opt_mem_priority.o passes/opt/opt_mem_widen.o passes/opt/opt_muxtree.o passes/opt/opt_reduce.o passes/opt/opt_dff.o passes/opt/opt_share.o passes/opt/opt_clean.o passes/opt/opt_expr.o passes/opt/share.o passes/opt/wreduce.o passes/opt/opt_demorgan.o passes/opt/rmports.o passes/opt/opt_lut.o passes/opt/opt_lut_ins.o passes/opt/pmux2shiftx.o passes/opt/muxpack.o passes/pmgen/test_pmgen.o passes/pmgen/ice40_dsp.o passes/pmgen/ice40_wrapcarry.o passes/pmgen/xilinx_dsp.o passes/pmgen/peepopt.o passes/pmgen/xilinx_srl.o passes/proc/proc.o passes/proc/proc_prune.o passes/proc/proc_clean.o passes/proc/proc_rmdead.o passes/proc/proc_init.o passes/proc/proc_arst.o passes/proc/proc_mux.o passes/proc/proc_dlatch.o passes/proc/proc_dff.o passes/proc/proc_memwr.o passes/sat/sat.o passes/sat/freduce.o passes/sat/eval.o passes/sat/sim.o passes/sat/miter.o passes/sat/expose.o passes/sat/assertpmux.o passes/sat/clk2fflogic.o passes/sat/async2sync.o passes/sat/supercover.o passes/sat/fmcombine.o passes/sat/mutate.o passes/sat/cutpoint.o passes/sat/fminit.o passes/sat/qbfsat.o passes/techmap/flatten.o passes/techmap/techmap.o passes/techmap/simplemap.o passes/techmap/dfflibmap.o passes/techmap/maccmap.o passes/techmap/libparse.o passes/techmap/abc.o passes/techmap/abc9.o passes/techmap/abc9_exe.o passes/techmap/abc9_ops.o passes/techmap/iopadmap.o passes/techmap/clkbufmap.o passes/techmap/hilomap.o passes/techmap/extract.o passes/techmap/extract_fa.o passes/techmap/extract_counter.o passes/techmap/extract_reduce.o passes/techmap/alumacc.o passes/techmap/dffinit.o passes/techmap/pmuxtree.o passes/techmap/muxcover.o passes/techmap/aigmap.o passes/techmap/tribuf.o passes/techmap/lut2mux.o passes/techmap/nlutmap.o passes/techmap/shregmap.o passes/techmap/deminout.o passes/techmap/insbuf.o passes/techmap/attrmvcp.o passes/techmap/attrmap.o passes/techmap/zinit.o passes/techmap/dfflegalize.o passes/techmap/dffunmap.o passes/techmap/flowmap.o passes/techmap/extractinv.o passes/tests/test_autotb.o passes/tests/test_cell.o passes/tests/test_abcloop.o backends/aiger/aiger.o backends/aiger/xaiger.o backends/blif/blif.o backends/btor/btor.o backends/cxxrtl/cxxrtl_backend.o backends/edif/edif.o backends/firrtl/firrtl.o backends/intersynth/intersynth.o backends/json/json.o backends/rtlil/rtlil_backend.o backends/simplec/simplec.o backends/smt2/smt2.o backends/smv/smv.o backends/spice/spice.o backends/table/table.o backends/verilog/verilog_backend.o techlibs/achronix/synth_achronix.o techlibs/anlogic/synth_anlogic.o techlibs/anlogic/anlogic_eqn.o techlibs/anlogic/anlogic_fixcarry.o techlibs/common/synth.o techlibs/common/prep.o techlibs/coolrunner2/synth_coolrunner2.o techlibs/coolrunner2/coolrunner2_sop.o techlibs/coolrunner2/coolrunner2_fixup.o techlibs/easic/synth_easic.o techlibs/ecp5/synth_ecp5.o techlibs/ecp5/ecp5_gsr.o techlibs/efinix/synth_efinix.o techlibs/efinix/efinix_fixcarry.o techlibs/gatemate/synth_gatemate.o techlibs/gowin/synth_gowin.o techlibs/greenpak4/synth_greenpak4.o techlibs/greenpak4/greenpak4_dffinv.o techlibs/ice40/synth_ice40.o techlibs/ice40/ice40_braminit.o techlibs/ice40/ice40_opt.o techlibs/intel/synth_intel.o techlibs/intel_alm/synth_intel_alm.o techlibs/machxo2/synth_machxo2.o techlibs/nexus/synth_nexus.o techlibs/quicklogic/synth_quicklogic.o techlibs/sf2/synth_sf2.o techlibs/xilinx/synth_xilinx.o techlibs/xilinx/xilinx_dffopt.o -lstdc++ -lm -lrt -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 cd manual && bash appnotes.sh Build successful. + for job in APPNOTE_010_Verilog_to_BLIF APPNOTE_011_Design_Investigation APPNOTE_012_Verilog_to_BTOR + '[' -f APPNOTE_010_Verilog_to_BLIF.ok -a APPNOTE_010_Verilog_to_BLIF.ok -nt APPNOTE_010_Verilog_to_BLIF.tex ']' + '[' -f APPNOTE_010_Verilog_to_BLIF/make.sh ']' ++ '[' -f APPNOTE_010_Verilog_to_BLIF.aux ']' ++ true + old_md5= + pdflatex -shell-escape -halt-on-error APPNOTE_010_Verilog_to_BLIF.tex This is pdfTeX, Version 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Transcript written on APPNOTE_010_Verilog_to_BLIF.log. ++ md5sum + new_md5='dcae658ec0c5e603463b364784e8a965 -' + '[' 'dcae658ec0c5e603463b364784e8a965 -' '!=' 'dcae658ec0c5e603463b364784e8a965 -' ']' + touch APPNOTE_010_Verilog_to_BLIF.ok + for job in APPNOTE_010_Verilog_to_BLIF APPNOTE_011_Design_Investigation APPNOTE_012_Verilog_to_BTOR + '[' -f APPNOTE_011_Design_Investigation.ok -a APPNOTE_011_Design_Investigation.ok -nt APPNOTE_011_Design_Investigation.tex ']' + '[' -f APPNOTE_011_Design_Investigation/make.sh ']' + cd APPNOTE_011_Design_Investigation + bash make.sh + false + for dot_file in *.dot + pdf_file=cmos_00.pdf + dot -Tpdf -o cmos_00.pdf cmos_00.dot + for dot_file in *.dot + pdf_file=cmos_01.pdf + dot -Tpdf -o cmos_01.pdf cmos_01.dot + for dot_file in *.dot + pdf_file=example_00.pdf + dot -Tpdf -o example_00.pdf example_00.dot + for dot_file in *.dot + pdf_file=example_01.pdf + dot -Tpdf -o example_01.pdf example_01.dot + for dot_file in *.dot + pdf_file=example_02.pdf + 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fontmap entry for `phvbo8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvbo8yn' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvr8yn' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvro8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvro8yn' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pncb8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pncbi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pncbo8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pncr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pncri8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pncro8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplb8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplbi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplbo8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplbu8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplr8yn': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplri8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplro8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplrr8ye': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplru8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmb8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmbi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmbo8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmr8yn': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmri8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmro8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmrr8ye': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplbi' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `rpxpplbo': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `rpxpplro': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pzcmi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvro' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbi' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmro' already exists, duplicates ignor ed }pdfTeX warning (ext4): destination with the same identifier (name{figure.1}) h as been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.174 pdfTeX warning (ext4): destination with the same identifier (name{figure. 2}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.174 <./APPNOTE_011_Design_Investigation/example_00.pdf> <./APPNOTE_011_Desig n_Investigation/example_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/example_01.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/example_02.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/example_02.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] LaTeX Warning: Reference `example_out' on page 2 undefined on input line 195. (./APPNOTE_011_Design_Investigation/splice.v Overfull \hbox (5.80966pt too wide) in paragraph at lines 1--3 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) Underfull \hbox (badness 10000) in paragraph at lines 213--216 [][] LaTeX Warning: Reference `splice_dia' on page 2 undefined on input line 226. LaTeX Warning: Reference `splice_src' on page 2 undefined on input line 226. Underfull \hbox (badness 10000) in paragraph at lines 229--236 []\T1/LinuxLibertineT-TLF/m/n/9 The key el-e-ments in un-der-stand-ing this cir -cuit Underfull \hbox (badness 10000) in paragraph at lines 229--236 \T1/LinuxLibertineT-TLF/m/n/9 di-a-gram are of course the boxes with round cor- ners Underfull \hbox (badness 10000) in paragraph at lines 229--236 \T1/LinuxLibertineT-TLF/m/n/9 and rows la-beled \T1/LinuxLibertineMonoT-TLF/reg ular/n/9 : -- Underfull \hbox (badness 10000) in paragraph at lines 229--236 \T1/LinuxLibertineMonoT-TLF/regular/n/9 :\T1/LinuxLiberti neT-TLF/m/n/9 . Each of this boxes has LaTeX Warning: Reference `splitnets_libfile' on page 2 undefined on input line 246. [2pdfTeX warning (ext4): destination with the same identifier (name{figure.3}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.253 pdfTeX warning (ext4): destination with the same identifier (name{figure. 4}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.253 pdfTeX warning (ext4): destination with the same identifier (name{figure. 5}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.253 <./APPNOTE_011_Design_Investigation/splice.pdf> <./APPNOTE_011_Design_In vestigation/cmos_00.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/cmos_00.pdf): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/cmos_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/cmos_01.pdf): PDF inclusion: multiple pdfs with page group included in a single page >] Underfull \hbox (badness 1412) in paragraph at lines 263--268 []\T1/LinuxLibertineT-TLF/m/n/9 In ad-di-tion to that, the 2nd di-a-gram was ge n-er-ated af-ter LaTeX Warning: Reference `example_src' on page 3 undefined on input line 337. LaTeX Warning: Reference `example_src' on page 3 undefined on input line 355. LaTeX Warning: Reference `example_out' on page 3 undefined on input line 355. LaTeX Warning: Reference `lscd' on page 3 undefined on input line 369. LaTeX Warning: Reference `example_src' on page 3 undefined on input line 370. LaTeX Warning: Reference `lscd' on page 3 undefined on input line 372. LaTeX Warning: Reference `example_out' on page 3 undefined on input line 373. LaTeX Warning: Reference `dump2' on page 3 undefined on input line 386. [3pdfTeX warning (ext4): destination with the same identifier (name{figure.6}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.390 F or the remainder of this document we will assume that the commands ar... pdfTeX warning (ext4): destination with the same identifier (name{figure.7}) ha s been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.390 F or the remainder of this document we will assume that the commands ar... ] LaTeX Warning: Reference `example_out' on page 4 undefined on input line 398. LaTeX Warning: Reference `example_out' on page 4 undefined on input line 398. LaTeX Warning: Reference `seladd' on page 4 undefined on input line 412. LaTeX Warning: Reference `seladd' on page 4 undefined on input line 420. (./APPNOTE_011_Design_Investigation/foobaraddsub.v Overfull \hbox (32.80994pt too wide) in paragraph at lines 1--2 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) (./APPNOTE_011_Design_Investigation/sumprod.v) LaTeX Warning: Reference `sumprod' on page 4 undefined on input line 455. LaTeX Warning: Reference `foobaraddsub' on page 4 undefined on input line 470. [4pdfTeX warning (ext4): destination with the same identifier (name{figure.8}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i pdfTeX warning (ext4): destination with the same id entifier (name{figure.9}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i pdfTeX warning (ext4): destination with the same id entifier (name{figure.10}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i pdfTeX warning (ext4): destination with the same id entifier (name{figure.11}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i <./APPNOTE_011_Design_Investigation/example_03.pdf > <./APPNOTE_011_Design_Investigation/sumprod_00.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_00.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] LaTeX Warning: Reference `sumprod' on page 5 undefined on input line 485. LaTeX Warning: Reference `sumprod_00' on page 5 undefined on input line 491. LaTeX Warning: Reference `sumprod_01' on page 5 undefined on input line 500. LaTeX Warning: Reference `sumprod' on page 5 undefined on input line 504. LaTeX Warning: Reference `sumprod_01' on page 5 undefined on input line 510. LaTeX Warning: Reference `select_prod' on page 5 undefined on input line 519. LaTeX Warning: Reference `memdemo_src' on page 5 undefined on input line 552. LaTeX Warning: Reference `memdemo_00' on page 5 undefined on input line 555. (./APPNOTE_011_Design_Investigation/memdemo.v Overfull \hbox (43.61005pt too wide) in paragraph at lines 13--14 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (5.80966pt too wide) in paragraph at lines 14--15 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) LaTeX Warning: Reference `memdemo_src' on page 5 undefined on input line 565. Underfull \vbox (badness 1490) has occurred while \output is active [5pdfTeX wa rning (ext4): destination with the same identifier (name{figure.12}) has been a lready used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.574 show y %ci2 pdfTeX warning (ext4): destination with the same identifier (n ame{figure.13}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.574 show y %ci2 pdfTeX warning (ext4): destination with the same identifier (n ame{figure.14}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.574 show y %ci2 <./APPNOTE_011_Design_Investigation/sumprod_01.pdf> <./APPNOT E_011_Design_Investigation/sumprod_02.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_02.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/sumprod_03.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_03.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/sumprod_04.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_04.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/sumprod_05.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_05.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] Underfull \hbox (badness 10000) in paragraph at lines 610--610 \T1/LinuxLibertineT-TLF/m/n/8 Figure 16. []Output of \T1/LinuxLibertineMonoT-T LF/regular/n/8 show y %ci2:+$dff[Q,D] LaTeX Warning: Reference `memdemo_01' on page 6 undefined on input line 632. [6pdfTeX warning (ext4): destination with the same identifier (name{figure.15}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.680 pdfTeX warning (ext4): destination with the same identifier (name{figure. 16}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.680 <./APPNOTE_011_Design_Investigation/memdemo_00.pdf> <./APPNOTE_011_Desig n_Investigation/memdemo_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/memdemo_01.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] LaTeX Warning: Reference `submod' on page 7 undefined on input line 681. LaTeX Warning: Reference `memdemo_src' on page 7 undefined on input line 682. LaTeX Warning: Reference `memdemo_00' on page 7 undefined on input line 682. Overfull \hbox (17.20978pt too wide) in paragraph at lines 692--693 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (34.00995pt too wide) in paragraph at lines 693--694 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (34.00995pt too wide) in paragraph at lines 694--695 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] LaTeX Warning: Reference `memdemo_src' on page 7 undefined on input line 699. LaTeX Warning: Reference `memdemo_00' on page 7 undefined on input line 699. LaTeX Warning: Reference `submod' on page 7 undefined on input line 706. Overfull \hbox (79.51968pt too wide) in paragraph at lines 710--710 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 yosys [selstage]> eval -set s2,s1 4'b1001 -set d 4'hc -show n2 -show n1 Overfull \hbox (34.71973pt too wide) in paragraph at lines 712--712 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 9. Executing EVAL pass (evaluate t he circuit given an input).[] Overfull \hbox (83.99968pt too wide) in paragraph at lines 713--713 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Full command line: eval -set s2,s1 4'b1001 -set d 4'hc -show n2 -show n1[] Overfull \hbox (39.19972pt too wide) in paragraph at lines 731--731 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 yosys [selstage]> eval -set-undef -set d[3:1] 0 -table s1,d[0] Overfull \hbox (39.19972pt too wide) in paragraph at lines 733--733 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 10. Executing EVAL pass (evaluate the circuit given an input).[] Overfull \hbox (43.67972pt too wide) in paragraph at lines 734--734 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Full command line: eval -set-undef -set d[3:1] 0 -table s1,d[0][] Overfull \hbox (3.35976pt too wide) in paragraph at lines 747--747 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Assumed undef (x) value for the fo llowing signals: \s2[] (./APPNOTE_011_Design_Investigation/primetest.v) LaTeX Warning: Reference `primesat' on page 7 undefined on input line 762. LaTeX Warning: Reference `primesat' on page 7 undefined on input line 762. Overfull \hbox (14.51244pt too wide) in paragraph at lines 806--807 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] LaTeX Warning: Reference `primetest' on page 7 undefined on input line 825. LaTeX Warning: Reference `primetest' on page 7 undefined on input line 825. LaTeX Warning: Citation `CircuitSAT' on page 7 undefined on input line 834. LaTeX Warning: Citation `MiniSAT' on page 7 undefined on input line 834. Overfull \hbox (52.63971pt too wide) in paragraph at lines 842--842 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 yosys [selstage]> sat -show s1,s2, d -set s1 s2 -set n2,n1 4'b1001 Overfull \hbox (34.71973pt too wide) in paragraph at lines 844--844 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 11. Executing SAT pass (solving SA T problems in the circuit).[] Overfull \hbox (57.1197pt too wide) in paragraph at lines 845--845 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Full command line: sat -show s1,s2 ,d -set s1 s2 -set n2,n1 4'b1001[] Overfull \hbox (25.75974pt too wide) in paragraph at lines 850--850 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Final constraint equation: { \n2 \ n1 \s1 } = { 4'1001 \s2 }[] [7pdfTeX warning (ext4): destination with the same identifier (name{figure.17}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.854 ...oblem with 81 variables and 207 clauses.. <./APPNOTE_011_Design_Invest igation/submod_00.pdf> <./APPNOTE_011_Design_Investigation/submod_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/submod_01.pdf ): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/submod_02.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/submod_02.pdf ): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/submod_03.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/submod_03.pdf ): PDF inclusion: multiple pdfs with page group included in a single page >] Overfull \hbox (30.23973pt too wide) in paragraph at lines 857--857 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Signal Name Dec Hex Bin[] Overfull \hbox (30.23973pt too wide) in paragraph at lines 858--858 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 -------------------- ---------- ---------- ---------------[] Overfull \hbox (30.23973pt too wide) in paragraph at lines 859--859 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 \d 9 9 1001[] Overfull \hbox (30.23973pt too wide) in paragraph at lines 860--860 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 \s1 0 0 00[] Overfull \hbox (30.23973pt too wide) in paragraph at lines 861--861 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 \s2 0 0 00[] LaTeX Warning: Reference `primetest' on page 8 undefined on input line 875. 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already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `rpxpplbo': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `rpxpplro': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pzcmi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvro' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbi' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmro' already exists, duplicates ignor ed }pdfTeX warning (ext4): destination with the same identifier (name{figure.1}) h as been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.174 pdfTeX warning (ext4): destination with the same identifier (name{figure. 2}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.174 <./APPNOTE_011_Design_Investigation/example_00.pdf> <./APPNOTE_011_Desig n_Investigation/example_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/example_01.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/example_02.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/example_02.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] (./APPNOTE_011_Design_Investigation/splice.v Overfull \hbox (5.80966pt too wide) in paragraph at lines 1--3 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) Underfull \hbox (badness 10000) in paragraph at lines 213--216 [][] Underfull \hbox (badness 10000) in paragraph at lines 229--236 []\T1/LinuxLibertineT-TLF/m/n/9 The key el-e-ments in un-der-stand-ing this cir -cuit Underfull \hbox (badness 10000) in paragraph at lines 229--236 \T1/LinuxLibertineT-TLF/m/n/9 di-a-gram are of course the boxes with round cor- ners Underfull \hbox (badness 10000) in paragraph at lines 229--236 \T1/LinuxLibertineT-TLF/m/n/9 and rows la-beled \T1/LinuxLibertineMonoT-TLF/reg ular/n/9 : -- Underfull \hbox (badness 10000) in paragraph at lines 229--236 \T1/LinuxLibertineMonoT-TLF/regular/n/9 :\T1/LinuxLiberti neT-TLF/m/n/9 . Each of this boxes has [2pdfTeX warning (ext4): destination with the same identifier (name{figure.3}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.253 pdfTeX warning (ext4): destination with the same identifier (name{figure. 4}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.253 pdfTeX warning (ext4): destination with the same identifier (name{figure. 5}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.253 <./APPNOTE_011_Design_Investigation/splice.pdf> <./APPNOTE_011_Design_In vestigation/cmos_00.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/cmos_00.pdf): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/cmos_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/cmos_01.pdf): PDF inclusion: multiple pdfs with page group included in a single page >] Underfull \hbox (badness 1412) in paragraph at lines 263--268 []\T1/LinuxLibertineT-TLF/m/n/9 In ad-di-tion to that, the 2nd di-a-gram was ge n-er-ated af-ter [3pdfTeX warning (ext4): destination with the same identifier (name{figure.6}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.390 F or the remainder of this document we will assume that the commands ar... pdfTeX warning (ext4): destination with the same identifier (name{figure.7}) ha s been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.390 F or the remainder of this document we will assume that the commands ar... ] (./APPNOTE_011_Design_Investigation/foobaraddsub.v Overfull \hbox (32.80994pt too wide) in paragraph at lines 1--2 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) (./APPNOTE_011_Design_Investigation/sumprod.v) [4pdfTeX warning (ext4): desti nation with the same identifier (name{figure.8}) has been already used, duplica te ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i pdfTeX warning (ext4): destination with the same id entifier (name{figure.9}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i pdfTeX warning (ext4): destination with the same id entifier (name{figure.10}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i pdfTeX warning (ext4): destination with the same id entifier (name{figure.11}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.482 select t:$add a:foo %i <./APPNOTE_011_Design_Investigation/example_03.pdf > <./APPNOTE_011_Design_Investigation/sumprod_00.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_00.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] (./APPNOTE_011_Design_Investigation/memdemo.v Overfull \hbox (43.61005pt too wide) in paragraph at lines 13--14 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (5.80966pt too wide) in paragraph at lines 14--15 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) Underfull \vbox (badness 1490) has occurred while \output is active [5pdfTeX wa rning (ext4): destination with the same identifier (name{figure.12}) has been a lready used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.574 show y %ci2 pdfTeX warning (ext4): destination with the same identifier (n ame{figure.13}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.574 show y %ci2 pdfTeX warning (ext4): destination with the same identifier (n ame{figure.14}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.574 show y %ci2 <./APPNOTE_011_Design_Investigation/sumprod_01.pdf> <./APPNOT E_011_Design_Investigation/sumprod_02.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_02.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/sumprod_03.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_03.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/sumprod_04.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_04.pd f): PDF inclusion: multiple pdfs with page group included in a single page > <./APPNOTE_011_Design_Investigation/sumprod_05.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/sumprod_05.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] Underfull \hbox (badness 10000) in paragraph at lines 610--610 \T1/LinuxLibertineT-TLF/m/n/8 Figure 16. []Output of \T1/LinuxLibertineMonoT-T LF/regular/n/8 show y %ci2:+$dff[Q,D] [6pdfTeX warning (ext4): destination with the same identifier (name{figure.15}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.680 pdfTeX warning (ext4): destination with the same identifier (name{figure. 16}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.680 <./APPNOTE_011_Design_Investigation/memdemo_00.pdf> <./APPNOTE_011_Desig n_Investigation/memdemo_01.pdf pdfTeX warning: pdflatex (file ./APPNOTE_011_Design_Investigation/memdemo_01.pd f): PDF inclusion: multiple pdfs with page group included in a single page >] Overfull \hbox (17.20978pt too wide) in paragraph at lines 692--693 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (34.00995pt too wide) in paragraph at lines 693--694 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (34.00995pt too wide) in paragraph at lines 694--695 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.51968pt too wide) in paragraph at lines 710--710 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 yosys [selstage]> eval -set s2,s1 4'b1001 -set d 4'hc -show n2 -show n1 Overfull \hbox (34.71973pt too wide) in paragraph at lines 712--712 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 9. Executing EVAL pass (evaluate t he circuit given an input).[] Overfull \hbox (83.99968pt too wide) in paragraph at lines 713--713 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Full command line: eval -set s2,s1 4'b1001 -set d 4'hc -show n2 -show n1[] Overfull \hbox (39.19972pt too wide) in paragraph at lines 731--731 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 yosys [selstage]> eval -set-undef -set d[3:1] 0 -table s1,d[0] Overfull \hbox (39.19972pt too wide) in paragraph at lines 733--733 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 10. Executing EVAL pass (evaluate the circuit given an input).[] Overfull \hbox (43.67972pt too wide) in paragraph at lines 734--734 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Full command line: eval -set-undef -set d[3:1] 0 -table s1,d[0][] Overfull \hbox (3.35976pt too wide) in paragraph at lines 747--747 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 Assumed undef (x) value for the fo llowing signals: \s2[] (./APPNOTE_011_Design_Investigation/primetest.v) Overfull \hbox (14.51244pt too wide) in paragraph at lines 806--807 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (52.63971pt too wide) in paragraph at lines 842--842 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 yosys [selstage]> sat -show s1,s2, d -set s1 s2 -set n2,n1 4'b1001 Overfull \hbox (34.71973pt too wide) in paragraph at lines 844--844 [] \T1/LinuxLibertineMonoT-TLF/regular/n/7 11. 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\l_shipout_box l.431 pdfTeX warning (ext4): destination with the same identifier (name{figure. 9}) has been already used, duplicate ignored ...shipout:D \box_use:N \l_shipout_box l.431 ] [4] (./APPNOTE_012_Verilog_to_BTOR.aux) LaTeX Warning: There were multiply-defined labels. ) (see the transcript file for additional information){/usr/share/texlive/texmf-d ist/fonts/enc/dvips/libertine/lbtn_7grukw.enc}{/usr/share/texlive/texmf-dist/fo nts/enc/dvips/lm/lm-mathit.enc}{/usr/share/texlive/texmf-dist/fonts/enc/dvips/l m/lm-rep-cmrm.enc}{/usr/share/texlive/texmf-dist/fonts/enc/dvips/lm/lm-mathsy.e nc}{/usr/share/texlive/texmf-dist/fonts/enc/dvips/libertine/lbtn_dhi6qf.enc}{/u sr/share/texlive/texmf-dist/fonts/enc/dvips/libertine/lbtn_ncsllp.enc}{/usr/sha re/texlive/texmf-dist/fonts/enc/dvips/libertine/lbtn_ki75ao.enc}{/usr/share/tex live/texmf-dist/fonts/enc/dvips/libertine/lbtn_nh77jq.enc}{/usr/share/texlive/t exmf-dist/fonts/enc/dvips/libertine/lbtn_76gpa5.enc} Output written on APPNOTE_012_Verilog_to_BTOR.pdf (4 pages, 367236 bytes). Transcript written on APPNOTE_012_Verilog_to_BTOR.log. ++ md5sum + new_md5='57179904c4f47ca0ca72277761b190a4 -' + '[' '57179904c4f47ca0ca72277761b190a4 -' '!=' '57179904c4f47ca0ca72277761b190a4 -' ']' + touch APPNOTE_012_Verilog_to_BTOR.ok cd manual && bash presentation.sh + false + md5sum APPNOTE_010_Verilog_to_BLIF.aux APPNOTE_011_Design_Investigation.aux APPNOTE_012_Verilog_to_BTOR.aux '*.snm' '*.nav' '*.toc' md5sum: '*.snm': No such file or directory md5sum: '*.nav': No such file or directory md5sum: '*.toc': No such file or directory + make -C PRESENTATION_Intro make[1]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_Intro' ../../yosys counter.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `counter.ys' -- 1. Executing Verilog-2005 frontend: counter.v Parsing Verilog input from `counter.v' to AST representation. Generating RTLIL representation for module `\counter'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \counter 2.2. Analyzing design hierarchy.. Top module: \counter Removed 0 unused modules. 3. Generating Graphviz representation of design. Writing dot description to `counter_00.dot'. Dumping module counter to page 1. Exec: dot -Tpdf 'counter_00.dot' > 'counter_00.pdf.new' && mv 'counter_00.pdf.new' 'counter_00.pdf' 4. Executing PROC pass (convert processes to netlists). 4.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 4.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$counter.v:6$1 in module counter. Removed a total of 0 dead cases. 4.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 0 assignments to connections. 4.4. Executing PROC_INIT pass (extract init attributes). 4.5. Executing PROC_ARST pass (detect async resets in processes). 4.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\counter.$proc$counter.v:6$1'. 1/1: $0\count[1:0] 4.7. Executing PROC_DLATCH pass (convert process syncs to latches). 4.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\counter.\count' using process `\counter.$proc$counter.v:6$1'. created $dff cell `$procdff$8' with positive edge clock. 4.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 4.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Found and cleaned up 2 empty switches in `\counter.$proc$counter.v:6$1'. Removing empty process `counter.$proc$counter.v:6$1'. Cleaned up 2 empty switches. 4.11. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 5. Executing OPT pass (performing simple optimizations). 5.1. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 5.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \counter.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \counter. Performed a total of 0 changes. 5.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 5.6. Executing OPT_DFF pass (perform DFF optimizations). Adding SRST signal on $procdff$8 ($dff) from module counter (D = $procmux$3_Y, Q = \count, rval = 2'00). Adding EN signal on $auto$ff.cc:262:slice$9 ($sdff) from module counter (D = $add$counter.v:10$2_Y, Q = \count). 5.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. Removed 2 unused cells and 5 unused wires. 5.8. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 5.9. Rerunning OPT passes. (Maybe there is more to do..) 5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \counter.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \counter. Performed a total of 0 changes. 5.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 5.13. Executing OPT_DFF pass (perform DFF optimizations). 5.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 5.15. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 5.16. Finished OPT passes. (There is nothing left to do.) 6. Executing MEMORY pass. 6.1. Executing OPT_MEM pass (optimize memories). Performed a total of 0 transformations. 6.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations). Performed a total of 0 transformations. 6.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths). 6.4. Executing MEMORY_DFF pass (merging $dff cells to $memrd). 6.5. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 6.6. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells). 6.7. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide). Performed a total of 0 transformations. 6.8. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 6.9. Executing MEMORY_COLLECT pass (generating $mem cells). 6.10. Executing MEMORY_MAP pass (converting memories to logic and flip-flops). 7. Executing OPT pass (performing simple optimizations). 7.1. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 7.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 7.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \counter.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 7.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \counter. Performed a total of 0 changes. 7.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 7.6. Executing OPT_DFF pass (perform DFF optimizations). 7.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 7.8. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 7.9. Finished OPT passes. (There is nothing left to do.) 8. Executing FSM pass (extract and optimize FSM). 8.1. Executing FSM_DETECT pass (finding FSMs in design). 8.2. Executing FSM_EXTRACT pass (extracting FSM from design). 8.3. Executing FSM_OPT pass (simple optimizations of FSMs). 8.4. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 8.5. Executing FSM_OPT pass (simple optimizations of FSMs). 8.6. Executing FSM_RECODE pass (re-assigning FSM state encoding). 8.7. Executing FSM_INFO pass (dumping all available information on FSM cells). 8.8. Executing FSM_MAP pass (mapping FSMs to basic logic). 9. Executing OPT pass (performing simple optimizations). 9.1. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 9.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 9.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \counter.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 9.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \counter. Performed a total of 0 changes. 9.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 9.6. Executing OPT_DFF pass (perform DFF optimizations). 9.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 9.8. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 9.9. Finished OPT passes. (There is nothing left to do.) 10. Generating Graphviz representation of design. Writing dot description to `counter_01.dot'. Dumping module counter to page 1. Exec: dot -Tpdf 'counter_01.dot' > 'counter_01.pdf.new' && mv 'counter_01.pdf.new' 'counter_01.pdf' 11. Executing TECHMAP pass (map to technology primitives). 11.1. Executing Verilog-2005 frontend: /builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/share/techmap.v Parsing Verilog input from `/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/share/techmap.v' to AST representation. Generating RTLIL representation for module `\_90_simplemap_bool_ops'. Generating RTLIL representation for module `\_90_simplemap_reduce_ops'. Generating RTLIL representation for module `\_90_simplemap_logic_ops'. Generating RTLIL representation for module `\_90_simplemap_compare_ops'. Generating RTLIL representation for module `\_90_simplemap_various'. Generating RTLIL representation for module `\_90_simplemap_registers'. Generating RTLIL representation for module `\_90_shift_ops_shr_shl_sshl_sshr'. Generating RTLIL representation for module `\_90_shift_shiftx'. Generating RTLIL representation for module `\_90_fa'. Generating RTLIL representation for module `\_90_lcu'. Generating RTLIL representation for module `\_90_alu'. Generating RTLIL representation for module `\_90_macc'. Generating RTLIL representation for module `\_90_alumacc'. Generating RTLIL representation for module `\$__div_mod_u'. Generating RTLIL representation for module `\$__div_mod_trunc'. Generating RTLIL representation for module `\_90_div'. Generating RTLIL representation for module `\_90_mod'. Generating RTLIL representation for module `\$__div_mod_floor'. Generating RTLIL representation for module `\_90_divfloor'. Generating RTLIL representation for module `\_90_modfloor'. Generating RTLIL representation for module `\_90_pow'. Generating RTLIL representation for module `\_90_pmux'. Generating RTLIL representation for module `\_90_lut'. Successfully finished Verilog frontend. 11.2. Continuing TECHMAP pass. Running "alumacc" on wrapper $extern:wrap:$add:A_SIGNED=0:A_WIDTH=2:B_SIGNED=0:B_WIDTH=2:Y_WIDTH=2:394426c56d1a028ba8fdd5469b163e04011def47. Using template $extern:wrap:$add:A_SIGNED=0:A_WIDTH=2:B_SIGNED=0:B_WIDTH=2:Y_WIDTH=2:394426c56d1a028ba8fdd5469b163e04011def47 for cells of type $extern:wrap:$add:A_SIGNED=0:A_WIDTH=2:B_SIGNED=0:B_WIDTH=2:Y_WIDTH=2:394426c56d1a028ba8fdd5469b163e04011def47. Using extmapper simplemap for cells of type $sdffe. Using template $paramod$7e708ae28ab761f11d0fb59d3ffc72f6a4baf5d9\_90_alu for cells of type $alu. Using extmapper simplemap for cells of type $xor. Using extmapper simplemap for cells of type $and. Using template $paramod\_90_lcu\WIDTH=32'00000000000000000000000000000010 for cells of type $lcu. Using extmapper simplemap for cells of type $pos. Using extmapper simplemap for cells of type $mux. Using extmapper simplemap for cells of type $not. Using extmapper simplemap for cells of type $or. No more expansions possible. 12. Executing OPT pass (performing simple optimizations). 12.1. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 12.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 12.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \counter.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 12.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \counter. Performed a total of 0 changes. 12.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 12.6. Executing OPT_DFF pass (perform DFF optimizations). 12.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. Removed 1 unused cells and 32 unused wires. 12.8. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 12.9. Rerunning OPT passes. (Maybe there is more to do..) 12.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \counter.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 12.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \counter. Performed a total of 0 changes. 12.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\counter'. Removed a total of 0 cells. 12.13. Executing OPT_DFF pass (perform DFF optimizations). 12.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \counter.. 12.15. Executing OPT_EXPR pass (perform const folding). Optimizing module counter. 12.16. Finished OPT passes. (There is nothing left to do.) 13. Executing SPLITNETS pass (splitting up multi-bit signals). Removed 0 unused cells and 2 unused wires. 14. Generating Graphviz representation of design. Writing dot description to `counter_02.dot'. Dumping module counter to page 1. Exec: dot -Tpdf 'counter_02.dot' > 'counter_02.pdf.new' && mv 'counter_02.pdf.new' 'counter_02.pdf' 15. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file). cell DFF (noninv, pins=3, area=18.00) is a direct match for cell type $_DFF_P_. final dff cell mappings: unmapped dff cell: $_DFF_N_ \DFF _DFF_P_ (.C( C), .D( D), .Q( Q)); unmapped dff cell: $_DFF_NN0_ unmapped dff cell: $_DFF_NN1_ unmapped dff cell: $_DFF_NP0_ unmapped dff cell: $_DFF_NP1_ unmapped dff cell: $_DFF_PN0_ unmapped dff cell: $_DFF_PN1_ unmapped dff cell: $_DFF_PP0_ unmapped dff cell: $_DFF_PP1_ unmapped dff cell: $_DFFSR_NNN_ unmapped dff cell: $_DFFSR_NNP_ unmapped dff cell: $_DFFSR_NPN_ unmapped dff cell: $_DFFSR_NPP_ unmapped dff cell: $_DFFSR_PNN_ unmapped dff cell: $_DFFSR_PNP_ unmapped dff cell: $_DFFSR_PPN_ unmapped dff cell: $_DFFSR_PPP_ 15.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target). Mapping DFF cells in module `\counter': mapped 2 $_DFF_P_ cells to \DFF cells. 16. Executing ABC pass (technology mapping using ABC). 16.1. Extracting gate netlist of module `\counter' to `/input.blif'.. Extracted 6 gates and 11 wires to a netlist network with 4 inputs and 2 outputs. 16.1.1. Executing ABC. Running ABC command: /usr/bin/abc -s -f /abc.script 2>&1 ABC: ABC command line: "source /abc.script". ABC: ABC: + read_blif /input.blif ABC: + read_lib -w /manual/PRESENTATION_Intro/mycells.lib ABC: Parsing finished successfully. Parsing time = 0.00 sec ABC: Warning: Templates are not defined. ABC: Libery parser cannot read "time_unit". Assuming time_unit : "1ns". ABC: Libery parser cannot read "capacitive_load_unit". Assuming capacitive_load_unit(1, pf). ABC: Scl_LibertyReadGenlib() skipped sequential cell "DFF". ABC: Library "demo" from "/manual/PRESENTATION_Intro/mycells.lib" has 4 cells (1 skipped: 1 seq; 0 tri-state; 0 no func; 0 dont_use). Time = 0.00 sec ABC: Memory = 0.00 MB. Time = 0.00 sec ABC: + strash ABC: + ifraig ABC: + scorr ABC: Warning: The network is combinational (run "fraig" or "fraig_sweep"). ABC: + dc2 ABC: + dretime ABC: + strash ABC: + &get -n ABC: + &dch -f ABC: + &nf ABC: + &put ABC: + write_blif /output.blif 16.1.2. Re-integrating ABC results. ABC RESULTS: NAND cells: 4 ABC RESULTS: NOR cells: 4 ABC RESULTS: NOT cells: 3 ABC RESULTS: internal signals: 5 ABC RESULTS: input signals: 4 ABC RESULTS: output signals: 2 Removing temp directory. Removed 0 unused cells and 10 unused wires. 17. Generating Graphviz representation of design. 17.1. Executing Verilog-2005 frontend: mycells.v Parsing Verilog input from `mycells.v' to AST representation. Generating RTLIL representation for module `\NOT'. Generating RTLIL representation for module `\NAND'. Generating RTLIL representation for module `\NOR'. Generating RTLIL representation for module `\DFF'. Successfully finished Verilog frontend. 17.2. Continuing show pass. Writing dot description to `counter_03.dot'. Dumping module counter to page 1. Exec: dot -Tpdf 'counter_03.dot' > 'counter_03.pdf.new' && mv 'counter_03.pdf.new' 'counter_03.pdf' End of script. Logfile hash: 97069db51d, CPU: user 0.10s system 0.04s, MEM: 13.89 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 59% 4x show (0 sec), 20% 1x abc (0 sec), ... make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_Intro' + make -C PRESENTATION_ExSyn make[1]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_ExSyn' ../../yosys -p 'script proc_01.ys; show -notitle -prefix proc_01 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script proc_01.ys; show -notitle -prefix proc_01 -format pdf' -- -- Executing script file `proc_01.ys' -- 1. Executing Verilog-2005 frontend: proc_01.v Parsing Verilog input from `proc_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$proc_01.v:2$1 in module test. Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 1 redundant assignment. Promoted 0 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). Found async reset \R in `\test.$proc$proc_01.v:2$1'. 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$proc_01.v:2$1'. 1/1: $0\Q[0:0] 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\Q' using process `\test.$proc$proc_01.v:2$1'. created $adff cell `$procdff$2' with positive edge clock and positive level reset. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$proc_01.v:2$1'. Cleaned up 0 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. Removed 0 unused cells and 1 unused wires. 4. Generating Graphviz representation of design. Writing dot description to `proc_01.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'proc_01.dot' > 'proc_01.pdf.new' && mv 'proc_01.pdf.new' 'proc_01.pdf' End of script. Logfile hash: 046f8ddc59, CPU: user 0.00s system 0.02s, MEM: 11.34 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 92% 1x show (0 sec), 2% 1x clean (0 sec), ... ../../yosys -p 'script proc_02.ys; show -notitle -prefix proc_02 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script proc_02.ys; show -notitle -prefix proc_02 -format pdf' -- -- Executing script file `proc_02.ys' -- 1. Executing Verilog-2005 frontend: proc_02.v Parsing Verilog input from `proc_02.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$proc_02.v:3$1 in module test. Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 1 redundant assignment. Promoted 0 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). Found async reset \R in `\test.$proc$proc_02.v:3$1'. 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$proc_02.v:3$1'. 1/1: $0\Q[0:0] 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\Q' using process `\test.$proc$proc_02.v:3$1'. Warning: Async reset value `\RV' is not constant! created $aldff cell `$procdff$2' with positive edge clock and positive level non-const reset. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$proc_02.v:3$1'. Cleaned up 0 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. Removed 0 unused cells and 1 unused wires. 4. Generating Graphviz representation of design. Writing dot description to `proc_02.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'proc_02.dot' > 'proc_02.pdf.new' && mv 'proc_02.pdf.new' 'proc_02.pdf' Warnings: 1 unique messages, 1 total End of script. Logfile hash: aa9cd0ea49, CPU: user 0.00s system 0.02s, MEM: 11.30 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 93% 1x show (0 sec), 2% 1x clean (0 sec), ... ../../yosys -p 'script proc_03.ys; show -notitle -prefix proc_03 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script proc_03.ys; show -notitle -prefix proc_03 -format pdf' -- -- Executing script file `proc_03.ys' -- 1. Executing Verilog-2005 frontend: proc_03.v Parsing Verilog input from `proc_03.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 0 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$proc_03.v:3$1'. 1/1: $0\Y[0:0] 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). No latch inferred for signal `\test.\Y' from process `\test.$proc$proc_03.v:3$1'. 3.8. Executing PROC_DFF pass (convert process syncs to FFs). 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Found and cleaned up 2 empty switches in `\test.$proc$proc_03.v:3$1'. Removing empty process `test.$proc$proc_03.v:3$1'. Cleaned up 2 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. Removed 0 unused cells and 4 unused wires. 4. Generating Graphviz representation of design. Writing dot description to `proc_03.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'proc_03.dot' > 'proc_03.pdf.new' && mv 'proc_03.pdf.new' 'proc_03.pdf' End of script. Logfile hash: 80ebe801ef, CPU: user 0.00s system 0.02s, MEM: 11.38 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 93% 1x show (0 sec), 2% 1x clean (0 sec), ... ../../yosys -p 'script opt_01.ys; show -notitle -prefix opt_01 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script opt_01.ys; show -notitle -prefix opt_01 -format pdf' -- -- Executing script file `opt_01.ys' -- 1. Executing Verilog-2005 frontend: opt_01.v Parsing Verilog input from `opt_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing OPT pass (performing simple optimizations). 3.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. dead port 2/2 on $mux $ternary$opt_01.v:2$1. Removed 1 multiplexer ports. 3.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. New ctrl vector for $mux cell $ternary$opt_01.v:2$2: { } Optimizing cells in module \test. Performed a total of 1 changes. 3.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.6. Executing OPT_DFF pass (perform DFF optimizations). 3.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 2 unused wires. 3.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.9. Rerunning OPT passes. (Maybe there is more to do..) 3.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 3.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 3.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.13. Executing OPT_DFF pass (perform DFF optimizations). 3.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 3.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.16. Finished OPT passes. (There is nothing left to do.) 4. Generating Graphviz representation of design. Writing dot description to `opt_01.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'opt_01.dot' > 'opt_01.pdf.new' && mv 'opt_01.pdf.new' 'opt_01.pdf' End of script. Logfile hash: b26b09be86, CPU: user 0.03s system 0.00s, MEM: 11.27 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 84% 1x show (0 sec), 5% 3x opt_expr (0 sec), ... ../../yosys -p 'script opt_02.ys; show -notitle -prefix opt_02 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script opt_02.ys; show -notitle -prefix opt_02 -format pdf' -- -- Executing script file `opt_02.ys' -- 1. Executing Verilog-2005 frontend: opt_02.v Parsing Verilog input from `opt_02.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing OPT pass (performing simple optimizations). 3.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 3.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 3.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.6. Executing OPT_DFF pass (perform DFF optimizations). 3.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 2 unused wires. 3.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.9. Rerunning OPT passes. (Maybe there is more to do..) 3.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 3.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 3.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.13. Executing OPT_DFF pass (perform DFF optimizations). 3.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 3.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.16. Finished OPT passes. (There is nothing left to do.) 4. Generating Graphviz representation of design. Writing dot description to `opt_02.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'opt_02.dot' > 'opt_02.pdf.new' && mv 'opt_02.pdf.new' 'opt_02.pdf' End of script. Logfile hash: 5a4000bb43, CPU: user 0.03s system 0.00s, MEM: 11.30 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 84% 1x show (0 sec), 5% 3x opt_expr (0 sec), ... ../../yosys -p 'script opt_03.ys; show -notitle -prefix opt_03 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script opt_03.ys; show -notitle -prefix opt_03 -format pdf' -- -- Executing script file `opt_03.ys' -- 1. Executing Verilog-2005 frontend: opt_03.v Parsing Verilog input from `opt_03.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing OPT pass (performing simple optimizations). 3.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 1 cells. 3.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 3.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 3.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.6. Executing OPT_DFF pass (perform DFF optimizations). 3.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 2 unused wires. 3.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.9. Rerunning OPT passes. (Maybe there is more to do..) 3.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 3.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 3.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 3.13. Executing OPT_DFF pass (perform DFF optimizations). 3.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 3.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 3.16. Finished OPT passes. (There is nothing left to do.) 4. Generating Graphviz representation of design. Writing dot description to `opt_03.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'opt_03.dot' > 'opt_03.pdf.new' && mv 'opt_03.pdf.new' 'opt_03.pdf' End of script. Logfile hash: 0cd024bc02, CPU: user 0.03s system 0.00s, MEM: 11.30 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 83% 1x show (0 sec), 5% 3x opt_expr (0 sec), ... ../../yosys -p 'script opt_04.ys; show -notitle -prefix opt_04 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script opt_04.ys; show -notitle -prefix opt_04 -format pdf' -- -- Executing script file `opt_04.ys' -- 1. Executing Verilog-2005 frontend: opt_04.v Parsing Verilog input from `opt_04.v' to AST representation. Generating RTLIL representation for module `\test'. Warning: wire '\Q1' is assigned in a block at opt_04.v:8.3-8.11. Warning: wire '\Q2' is assigned in a block at opt_04.v:12.3-12.11. Warning: wire '\Q2' is assigned in a block at opt_04.v:14.3-14.11. Warning: wire '\Q3' is assigned in a block at opt_04.v:17.2-17.10. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$opt_04.v:10$2 in module test. Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 1 redundant assignment. Promoted 1 assignment to connection. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). Found async reset \ARST in `\test.$proc$opt_04.v:10$2'. Found async reset \ARST in `\test.$proc$opt_04.v:6$1'. 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$opt_04.v:16$3'. Creating decoders for process `\test.$proc$opt_04.v:10$2'. 1/1: $0\Q2[7:0] Creating decoders for process `\test.$proc$opt_04.v:6$1'. 1/1: $0\Q1[7:0] 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\Q3' using process `\test.$proc$opt_04.v:16$3'. created $dff cell `$procdff$4' with positive edge clock. Creating register for signal `\test.\Q2' using process `\test.$proc$opt_04.v:10$2'. created $adff cell `$procdff$5' with positive edge clock and positive level reset. Creating register for signal `\test.\Q1' using process `\test.$proc$opt_04.v:6$1'. created $adff cell `$procdff$6' with positive edge clock and positive level reset. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$opt_04.v:16$3'. Removing empty process `test.$proc$opt_04.v:10$2'. Removing empty process `test.$proc$opt_04.v:6$1'. Cleaned up 0 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4. Executing OPT pass (performing simple optimizations). 4.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 4.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 4.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 4.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 4.6. Executing OPT_DFF pass (perform DFF optimizations). Setting constant 0-bit at position 0 on $procdff$4 ($dff) from module test. Setting constant 1-bit at position 1 on $procdff$4 ($dff) from module test. Setting constant 0-bit at position 2 on $procdff$4 ($dff) from module test. Setting constant 1-bit at position 3 on $procdff$4 ($dff) from module test. Setting constant 0-bit at position 4 on $procdff$4 ($dff) from module test. Setting constant 1-bit at position 5 on $procdff$4 ($dff) from module test. Setting constant 0-bit at position 6 on $procdff$4 ($dff) from module test. Setting constant 0-bit at position 7 on $procdff$4 ($dff) from module test. Handling const CLK on $procdff$5 ($adff) from module test (removing D path). Setting constant 0-bit at position 0 on $procdff$5 ($adff) from module test. Setting constant 1-bit at position 1 on $procdff$5 ($adff) from module test. Setting constant 0-bit at position 2 on $procdff$5 ($adff) from module test. Setting constant 1-bit at position 3 on $procdff$5 ($adff) from module test. Setting constant 0-bit at position 4 on $procdff$5 ($adff) from module test. Setting constant 1-bit at position 5 on $procdff$5 ($adff) from module test. Setting constant 0-bit at position 6 on $procdff$5 ($adff) from module test. Setting constant 0-bit at position 7 on $procdff$5 ($adff) from module test. Handling D = Q on $procdff$6 ($adff) from module test (removing D path). Setting constant 0-bit at position 0 on $procdff$6 ($adff) from module test. Setting constant 1-bit at position 1 on $procdff$6 ($adff) from module test. Setting constant 0-bit at position 2 on $procdff$6 ($adff) from module test. Setting constant 1-bit at position 3 on $procdff$6 ($adff) from module test. Setting constant 0-bit at position 4 on $procdff$6 ($adff) from module test. Setting constant 1-bit at position 5 on $procdff$6 ($adff) from module test. Setting constant 0-bit at position 6 on $procdff$6 ($adff) from module test. Setting constant 0-bit at position 7 on $procdff$6 ($adff) from module test. 4.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 3 unused wires. 4.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4.9. Rerunning OPT passes. (Maybe there is more to do..) 4.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 4.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 4.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 4.13. Executing OPT_DFF pass (perform DFF optimizations). 4.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 4.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4.16. Finished OPT passes. (There is nothing left to do.) 5. Generating Graphviz representation of design. Writing dot description to `opt_04.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'opt_04.dot' > 'opt_04.pdf.new' && mv 'opt_04.pdf.new' 'opt_04.pdf' Warnings: 4 unique messages, 4 total End of script. Logfile hash: 7b52b2a4fd, CPU: user 0.03s system 0.00s, MEM: 11.42 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 82% 1x show (0 sec), 5% 4x opt_expr (0 sec), ... ../../yosys -p 'script memory_01.ys; show -notitle -prefix memory_01 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script memory_01.ys; show -notitle -prefix memory_01 -format pdf' -- -- Executing script file `memory_01.ys' -- 1. Executing Verilog-2005 frontend: memory_01.v Parsing Verilog input from `memory_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 4 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$memory_01.v:5$2'. 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\DOUT' using process `\test.$proc$memory_01.v:5$2'. created $dff cell `$procdff$7' with positive edge clock. Creating register for signal `\test.$memwr$\mem$memory_01.v:6$1_ADDR' using process `\test.$proc$memory_01.v:5$2'. created $dff cell `$procdff$8' with positive edge clock. Creating register for signal `\test.$memwr$\mem$memory_01.v:6$1_DATA' using process `\test.$proc$memory_01.v:5$2'. created $dff cell `$procdff$9' with positive edge clock. Creating register for signal `\test.$memwr$\mem$memory_01.v:6$1_EN' using process `\test.$proc$memory_01.v:5$2'. created $dff cell `$procdff$10' with positive edge clock. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$memory_01.v:5$2'. Cleaned up 0 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. Removed 3 unused cells and 7 unused wires. 4. Executing MEMORY pass. 4.1. Executing OPT_MEM pass (optimize memories). Performed a total of 0 transformations. 4.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations). Performed a total of 0 transformations. 4.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths). Analyzing test.mem write port 0. 4.4. Executing MEMORY_DFF pass (merging $dff cells to $memrd). Checking read port `\mem'[0] in module `\test': merging output FF to cell. Write port 0: non-transparent. 4.5. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 1 unused cells and 9 unused wires. 4.6. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells). 4.7. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide). Performed a total of 0 transformations. 4.8. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 4.9. Executing MEMORY_COLLECT pass (generating $mem cells). 4.10. Executing MEMORY_MAP pass (converting memories to logic and flip-flops). Mapping memory \mem in module \test: created 2 $dff cells and 0 static cells of width 8. Extracted data FF from read port 0 of test.mem: $\mem$rdreg[0] read interface: 1 $dff and 1 $mux cells. write interface: 2 write mux blocks. 5. Executing OPT pass (performing simple optimizations). 5.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.6. Executing OPT_DFF pass (perform DFF optimizations). 5.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 1 unused cells and 6 unused wires. 5.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.9. Rerunning OPT passes. (Maybe there is more to do..) 5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.13. Executing OPT_DFF pass (perform DFF optimizations). Adding EN signal on $memory\mem[1]$23 ($dff) from module test (D = \DIN, Q = \mem[1]). Adding EN signal on $memory\mem[0]$21 ($dff) from module test (D = \DIN, Q = \mem[0]). 5.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 2 unused cells and 2 unused wires. 5.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.16. Rerunning OPT passes. (Maybe there is more to do..) 5.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 5.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.19. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.20. Executing OPT_DFF pass (perform DFF optimizations). 5.21. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 5.22. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.23. Finished OPT passes. (There is nothing left to do.) 6. Generating Graphviz representation of design. Writing dot description to `memory_01.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'memory_01.dot' > 'memory_01.pdf.new' && mv 'memory_01.pdf.new' 'memory_01.pdf' End of script. Logfile hash: 9a22118a5b, CPU: user 0.03s system 0.02s, MEM: 11.69 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 71% 1x show (0 sec), 7% 5x opt_expr (0 sec), ... ../../yosys -p 'script memory_02.ys; show -notitle -prefix memory_02 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script memory_02.ys; show -notitle -prefix memory_02 -format pdf' -- -- Executing script file `memory_02.ys' -- 1. Executing Verilog-2005 frontend: memory_02.v Parsing Verilog input from `memory_02.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$memory_02.v:17$10 in module test. Marked 1 switch rules as full_case in process $proc$memory_02.v:13$3 in module test. Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 8 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$memory_02.v:24$19'. Creating decoders for process `\test.$proc$memory_02.v:21$17'. Creating decoders for process `\test.$proc$memory_02.v:17$10'. 1/3: $1$memwr$\memory$memory_02.v:19$2_EN[7:0]$16 2/3: $1$memwr$\memory$memory_02.v:19$2_DATA[7:0]$15 3/3: $1$memwr$\memory$memory_02.v:19$2_ADDR[7:0]$14 Creating decoders for process `\test.$proc$memory_02.v:13$3'. 1/3: $1$memwr$\memory$memory_02.v:15$1_EN[7:0]$9 2/3: $1$memwr$\memory$memory_02.v:15$1_DATA[7:0]$8 3/3: $1$memwr$\memory$memory_02.v:15$1_ADDR[7:0]$7 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\RD2_DATA' using process `\test.$proc$memory_02.v:24$19'. created $dff cell `$procdff$39' with positive edge clock. Creating register for signal `\test.\RD1_DATA' using process `\test.$proc$memory_02.v:21$17'. created $dff cell `$procdff$40' with positive edge clock. Creating register for signal `\test.$memwr$\memory$memory_02.v:19$2_ADDR' using process `\test.$proc$memory_02.v:17$10'. created $dff cell `$procdff$41' with positive edge clock. Creating register for signal `\test.$memwr$\memory$memory_02.v:19$2_DATA' using process `\test.$proc$memory_02.v:17$10'. created $dff cell `$procdff$42' with positive edge clock. Creating register for signal `\test.$memwr$\memory$memory_02.v:19$2_EN' using process `\test.$proc$memory_02.v:17$10'. created $dff cell `$procdff$43' with positive edge clock. Creating register for signal `\test.$memwr$\memory$memory_02.v:15$1_ADDR' using process `\test.$proc$memory_02.v:13$3'. created $dff cell `$procdff$44' with positive edge clock. Creating register for signal `\test.$memwr$\memory$memory_02.v:15$1_DATA' using process `\test.$proc$memory_02.v:13$3'. created $dff cell `$procdff$45' with positive edge clock. Creating register for signal `\test.$memwr$\memory$memory_02.v:15$1_EN' using process `\test.$proc$memory_02.v:13$3'. created $dff cell `$procdff$46' with positive edge clock. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$memory_02.v:24$19'. Removing empty process `test.$proc$memory_02.v:21$17'. Found and cleaned up 1 empty switch in `\test.$proc$memory_02.v:17$10'. Removing empty process `test.$proc$memory_02.v:17$10'. Found and cleaned up 1 empty switch in `\test.$proc$memory_02.v:13$3'. Removing empty process `test.$proc$memory_02.v:13$3'. Cleaned up 2 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. Removed 6 unused cells and 26 unused wires. 4. Executing MEMORY pass. 4.1. Executing OPT_MEM pass (optimize memories). Performed a total of 0 transformations. 4.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations). Performed a total of 0 transformations. 4.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths). Analyzing test.memory write port 0. Analyzing test.memory write port 1. 4.4. Executing MEMORY_DFF pass (merging $dff cells to $memrd). Checking read port `\memory'[0] in module `\test': merging output FF to cell. Checking read port `\memory'[1] in module `\test': merging output FF to cell. 4.5. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 2 unused cells and 18 unused wires. 4.6. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells). Consolidating read ports of memory test.memory by address: Consolidating write ports of memory test.memory by address: Consolidating write ports of memory test.memory using sat-based resource sharing: 4.7. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide). Performed a total of 0 transformations. 4.8. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 4.9. Executing MEMORY_COLLECT pass (generating $mem cells). 5. Executing OPT pass (performing simple optimizations). 5.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Consolidated identical input bits for $mux cell $procmux$31: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 New ports: A=1'0, B=1'1, Y=$0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] New connections: $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [7:1] = { $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] $0$memwr$\memory$memory_02.v:15$1_EN[7:0]$6 [0] } Consolidated identical input bits for $mux cell $procmux$22: Old ports: A=8'00000000, B=8'11111111, Y=$0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 New ports: A=1'0, B=1'1, Y=$0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] New connections: $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [7:1] = { $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] $0$memwr$\memory$memory_02.v:19$2_EN[7:0]$13 [0] } Optimizing cells in module \test. Performed a total of 2 changes. 5.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.6. Executing OPT_DFF pass (perform DFF optimizations). 5.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 4 unused wires. 5.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.9. Rerunning OPT passes. (Maybe there is more to do..) 5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.13. Executing OPT_DFF pass (perform DFF optimizations). 5.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 2 unused wires. 5.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.16. Rerunning OPT passes. (Maybe there is more to do..) 5.17. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 5.18. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.19. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.20. Executing OPT_DFF pass (perform DFF optimizations). 5.21. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 5.22. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.23. Finished OPT passes. (There is nothing left to do.) 6. Generating Graphviz representation of design. Writing dot description to `memory_02.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'memory_02.dot' > 'memory_02.pdf.new' && mv 'memory_02.pdf.new' 'memory_02.pdf' End of script. Logfile hash: 4f259ae542, CPU: user 0.04s system 0.02s, MEM: 11.75 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 69% 1x show (0 sec), 7% 5x opt_clean (0 sec), ... ../../yosys -p 'script techmap_01.ys; show -notitle -prefix techmap_01 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script techmap_01.ys; show -notitle -prefix techmap_01 -format pdf' -- -- Executing script file `techmap_01.ys' -- 1. Executing Verilog-2005 frontend: techmap_01.v Parsing Verilog input from `techmap_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: techmap_01_map.v Parsing Verilog input from `techmap_01_map.v' to AST representation. Generating RTLIL representation for module `\$add'. Successfully finished Verilog frontend. 3.2. Continuing TECHMAP pass. Using template $paramod$fbc7873bff55778c0b3173955b7e4bce1d9d6834\$add for cells of type $add. No more expansions possible. Removed 0 unused cells and 7 unused wires. 4. Generating Graphviz representation of design. Writing dot description to `techmap_01.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'techmap_01.dot' > 'techmap_01.pdf.new' && mv 'techmap_01.pdf.new' 'techmap_01.pdf' End of script. Logfile hash: b9ee13b07b, CPU: user 0.00s system 0.02s, MEM: 11.35 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 91% 1x show (0 sec), 3% 1x techmap (0 sec), ... ../../yosys -p 'script abc_01.ys; show -notitle -prefix abc_01 -format pdf' /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Running command `script abc_01.ys; show -notitle -prefix abc_01 -format pdf' -- -- Executing script file `abc_01.ys' -- 1. Executing Verilog-2005 frontend: abc_01.v Parsing Verilog input from `abc_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing Verilog-2005 frontend: abc_01_cells.v Parsing Verilog input from `abc_01_cells.v' to AST representation. Generating RTLIL representation for module `\BUF'. Generating RTLIL representation for module `\NOT'. Generating RTLIL representation for module `\NAND'. Generating RTLIL representation for module `\NOR'. Generating RTLIL representation for module `\DFF'. Generating RTLIL representation for module `\DFFSR'. Successfully finished Verilog frontend. 3. Executing HIERARCHY pass (managing design hierarchy). 3.1. Analyzing design hierarchy.. Top module: \test 3.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 4. Executing PROC pass (convert processes to netlists). 4.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 4.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 4.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 3 assignments to connections. 4.4. Executing PROC_INIT pass (extract init attributes). 4.5. Executing PROC_ARST pass (detect async resets in processes). 4.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$abc_01.v:5$1'. 4.7. Executing PROC_DLATCH pass (convert process syncs to latches). 4.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\y' using process `\test.$proc$abc_01.v:5$1'. created $dff cell `$procdff$3' with positive edge clock. Creating register for signal `\test.\q1' using process `\test.$proc$abc_01.v:5$1'. created $dff cell `$procdff$4' with positive edge clock. Creating register for signal `\test.\q2' using process `\test.$proc$abc_01.v:5$1'. created $dff cell `$procdff$5' with positive edge clock. 4.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 4.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$abc_01.v:5$1'. Cleaned up 0 empty switches. 4.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5. Executing OPT pass (performing simple optimizations). 5.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.6. Executing OPT_DFF pass (perform DFF optimizations). 5.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 0 unused cells and 3 unused wires. 5.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.9. Rerunning OPT passes. (Maybe there is more to do..) 5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. No muxes found in this module. Removed 0 multiplexer ports. 5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 5.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 5.13. Executing OPT_DFF pass (perform DFF optimizations). 5.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 5.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 5.16. Finished OPT passes. (There is nothing left to do.) 6. Executing TECHMAP pass (map to technology primitives). 6.1. Executing Verilog-2005 frontend: /builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/share/techmap.v Parsing Verilog input from `/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/share/techmap.v' to AST representation. Generating RTLIL representation for module `\_90_simplemap_bool_ops'. Generating RTLIL representation for module `\_90_simplemap_reduce_ops'. Generating RTLIL representation for module `\_90_simplemap_logic_ops'. Generating RTLIL representation for module `\_90_simplemap_compare_ops'. Generating RTLIL representation for module `\_90_simplemap_various'. Generating RTLIL representation for module `\_90_simplemap_registers'. Generating RTLIL representation for module `\_90_shift_ops_shr_shl_sshl_sshr'. Generating RTLIL representation for module `\_90_shift_shiftx'. Generating RTLIL representation for module `\_90_fa'. Generating RTLIL representation for module `\_90_lcu'. Generating RTLIL representation for module `\_90_alu'. Generating RTLIL representation for module `\_90_macc'. Generating RTLIL representation for module `\_90_alumacc'. Generating RTLIL representation for module `\$__div_mod_u'. Generating RTLIL representation for module `\$__div_mod_trunc'. Generating RTLIL representation for module `\_90_div'. Generating RTLIL representation for module `\_90_mod'. Generating RTLIL representation for module `\$__div_mod_floor'. Generating RTLIL representation for module `\_90_divfloor'. Generating RTLIL representation for module `\_90_modfloor'. Generating RTLIL representation for module `\_90_pow'. Generating RTLIL representation for module `\_90_pmux'. Generating RTLIL representation for module `\_90_lut'. Successfully finished Verilog frontend. 6.2. Continuing TECHMAP pass. Using extmapper simplemap for cells of type $reduce_xor. Using extmapper simplemap for cells of type $dff. No more expansions possible. 7. Executing ABC pass (technology mapping using ABC). 7.1. Summary of detected clock domains: 9 cells in clk=\clk, en={ } 7.2. Extracting gate netlist of module `\test' to `/input.blif'.. Found matching posedge clock domain: \clk Extracted 9 gates and 12 wires to a netlist network with 3 inputs and 1 outputs. 7.2.1. Executing ABC. Running ABC command: /usr/bin/abc -s -f /abc.script 2>&1 ABC: ABC command line: "source /abc.script". ABC: ABC: + read_blif /input.blif ABC: + read_lib -w /manual/PRESENTATION_ExSyn/abc_01_cells.lib ABC: Parsing finished successfully. Parsing time = 0.00 sec ABC: Warning: Templates are not defined. ABC: Libery parser cannot read "time_unit". Assuming time_unit : "1ns". ABC: Libery parser cannot read "capacitive_load_unit". Assuming capacitive_load_unit(1, pf). ABC: Scl_LibertyReadGenlib() skipped sequential cell "DFF". ABC: Scl_LibertyReadGenlib() skipped sequential cell "DFFSR". ABC: Library "demo" from "/manual/PRESENTATION_ExSyn/abc_01_cells.lib" has 4 cells (2 skipped: 2 seq; 0 tri-state; 0 no func; 0 dont_use). Time = 0.00 sec ABC: Memory = 0.00 MB. Time = 0.00 sec ABC: + strash ABC: + ifraig ABC: + scorr ABC: Warning: 7 registers in this network have don't-care init values. ABC: The don't-care are assumed to be 0. The result may not verify. ABC: Use command "print_latch" to see the init values of registers. ABC: Use command "zero" to convert or "init" to change the values. ABC: + dc2 ABC: + dretime ABC: + strash ABC: + &get -n ABC: + &dch -f ABC: + &nf ABC: + &put ABC: + write_blif /output.blif 7.2.2. Re-integrating ABC results. ABC RESULTS: BUF cells: 3 ABC RESULTS: NAND cells: 2 ABC RESULTS: NOR cells: 5 ABC RESULTS: NOT cells: 3 ABC RESULTS: _dff_ cells: 3 ABC RESULTS: internal signals: 8 ABC RESULTS: input signals: 3 ABC RESULTS: output signals: 1 Removing temp directory. Removed 0 unused cells and 9 unused wires. 8. Generating Graphviz representation of design. Writing dot description to `abc_01.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'abc_01.dot' > 'abc_01.pdf.new' && mv 'abc_01.pdf.new' 'abc_01.pdf' End of script. Logfile hash: 05d2c48127, CPU: user 0.07s system 0.00s, MEM: 13.88 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 41% 1x show (0 sec), 37% 1x abc (0 sec), ... make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_ExSyn' + make -C PRESENTATION_ExAdv make[1]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_ExAdv' ../../yosys select.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `select.ys' -- 1. Executing Verilog-2005 frontend: select.v Parsing Verilog input from `select.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 2 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\test.$proc$select.v:7$1'. 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\test.\b' using process `\test.$proc$select.v:7$1'. created $dff cell `$procdff$8' with positive edge clock. Creating register for signal `\test.\c' using process `\test.$proc$select.v:7$1'. created $dff cell `$procdff$9' with positive edge clock. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `test.$proc$select.v:7$1'. Cleaned up 0 empty switches. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4. Executing OPT pass (performing simple optimizations). 4.1. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4.2. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 1 cells. 4.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 4.5. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 4.6. Executing OPT_DFF pass (perform DFF optimizations). 4.7. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. Removed 1 unused cells and 7 unused wires. 4.8. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4.9. Rerunning OPT passes. (Maybe there is more to do..) 4.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees). Running muxtree optimizer on module \test.. Creating internal representation of mux trees. Evaluating internal representation of mux trees. Analyzing evaluation results. Removed 0 multiplexer ports. 4.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs). Optimizing cells in module \test. Performed a total of 0 changes. 4.12. Executing OPT_MERGE pass (detect identical cells). Finding identical cells in module `\test'. Removed a total of 0 cells. 4.13. Executing OPT_DFF pass (perform DFF optimizations). 4.14. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \test.. 4.15. Executing OPT_EXPR pass (perform const folding). Optimizing module test. 4.16. Finished OPT passes. (There is nothing left to do.) 5. Generating Graphviz representation of design. Writing dot description to `select.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'select.dot' > 'select.pdf.new' && mv 'select.pdf.new' 'select.pdf' End of script. Logfile hash: 4809312089, CPU: user 0.03s system 0.01s, MEM: 11.40 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 77% 1x show (0 sec), 7% 4x opt_expr (0 sec), ... ../../yosys red_or3x1_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `red_or3x1_test.ys' -- 1. Executing Verilog-2005 frontend: red_or3x1_test.v Parsing Verilog input from `red_or3x1_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: red_or3x1_map.v Parsing Verilog input from `red_or3x1_map.v' to AST representation. Generating RTLIL representation for module `\$reduce_or'. Successfully finished Verilog frontend. 3.2. Continuing TECHMAP pass. Using template $paramod$53153ae57fdb25b25475408a64760d7986ecfb0e\$reduce_or for cells of type $reduce_or. Using template $paramod$fe2472242c070f3b22e97f6c8c19c3569e575d97\$reduce_or for cells of type $reduce_or. Using template $paramod$1a3ccc6b2ad940e0a4ee2fb765a3adeb638fb7f0\$reduce_or for cells of type $reduce_or. No more expansions possible. Removed 0 unused cells and 18 unused wires. 4. Executing SPLITNETS pass (splitting up multi-bit signals). 5. Generating Graphviz representation of design. 5.1. Executing Verilog-2005 frontend: red_or3x1_cells.v Parsing Verilog input from `red_or3x1_cells.v' to AST representation. Generating RTLIL representation for module `\OR3X1'. Successfully finished Verilog frontend. 5.2. Continuing show pass. Writing dot description to `red_or3x1.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'red_or3x1.dot' > 'red_or3x1.pdf.new' && mv 'red_or3x1.pdf.new' 'red_or3x1.pdf' End of script. Logfile hash: 129023a082, CPU: user 0.02s system 0.00s, MEM: 11.40 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 90% 1x show (0 sec), 4% 1x techmap (0 sec), ... ../../yosys sym_mul_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `sym_mul_test.ys' -- 1. Executing Verilog-2005 frontend: sym_mul_test.v Parsing Verilog input from `sym_mul_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: sym_mul_map.v Parsing Verilog input from `sym_mul_map.v' to AST representation. Generating RTLIL representation for module `\$mul'. Successfully finished Verilog frontend. 3.2. Continuing TECHMAP pass. Using template $paramod$a1bc51c02ce12ac21eb18988e83292af48ed7d72\$mul for cells of type $mul. No more expansions possible. Removed 0 unused cells and 6 unused wires. 4. Generating Graphviz representation of design. 4.1. Executing Verilog-2005 frontend: sym_mul_cells.v Parsing Verilog input from `sym_mul_cells.v' to AST representation. Generating RTLIL representation for module `\MYMUL'. Successfully finished Verilog frontend. 4.2. Continuing show pass. Writing dot description to `sym_mul.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'sym_mul.dot' > 'sym_mul.pdf.new' && mv 'sym_mul.pdf.new' 'sym_mul.pdf' End of script. Logfile hash: 772afb568b, CPU: user 0.02s system 0.00s, MEM: 11.37 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 92% 1x show (0 sec), 2% 1x clean (0 sec), ... ../../yosys mymul_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `mymul_test.ys' -- 1. Executing Verilog-2005 frontend: mymul_test.v Parsing Verilog input from `mymul_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: sym_mul_map.v Parsing Verilog input from `sym_mul_map.v' to AST representation. Generating RTLIL representation for module `\$mul'. Successfully finished Verilog frontend. 3.2. Executing Verilog-2005 frontend: mymul_map.v Parsing Verilog input from `mymul_map.v' to AST representation. Generating RTLIL representation for module `\MYMUL'. Successfully finished Verilog frontend. 3.3. Continuing TECHMAP pass. Using template $paramod$7e708ae28ab761f11d0fb59d3ffc72f6a4baf5d9\$mul for cells of type $mul. Using template $paramod\MYMUL\WIDTH=32'00000000000000000000000000000010 for cells of type MYMUL. No more expansions possible. Removed 0 unused cells and 10 unused wires. Renaming module \test to \test_mapped. 4. Executing Verilog-2005 frontend: mymul_test.v Parsing Verilog input from `mymul_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 5. Executing MITER pass (creating miter circuit). Creating miter cell "miter" with gold cell "test" and gate cell "test_mapped". 6. Executing FLATTEN pass (flatten design). 7. Executing SAT pass (solving SAT problems in the circuit). Setting up SAT problem: Final constraint equation: { } = { } Imported 7 cells to SAT database. Import proof-constraint: \trigger = 1'0 Final proof equation: \trigger = 1'0 Solving problem with 107 variables and 283 clauses.. SAT proof finished - no model found: SUCCESS! /$$$$$$ /$$$$$$$$ /$$$$$$$ /$$__ $$ | $$_____/ | $$__ $$ | $$ \ $$ | $$ | $$ \ $$ | $$ | $$ | $$$$$ | $$ | $$ | $$ | $$ | $$__/ | $$ | $$ | $$/$$ $$ | $$ | $$ | $$ | $$$$$$/ /$$| $$$$$$$$ /$$| $$$$$$$//$$ \____ $$$|__/|________/|__/|_______/|__/ \__/ 8. Executing SPLITNETS pass (splitting up multi-bit signals). 9. Generating Graphviz representation of design. Writing dot description to `mymul.dot'. Dumping module test_mapped to page 1. Exec: dot -Tpdf 'mymul.dot' > 'mymul.pdf.new' && mv 'mymul.pdf.new' 'mymul.pdf' End of script. Logfile hash: f23e100602, CPU: user 0.02s system 0.01s, MEM: 12.20 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 79% 1x show (0 sec), 5% 2x clean (0 sec), ... ../../yosys mulshift_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `mulshift_test.ys' -- 1. Executing Verilog-2005 frontend: mulshift_test.v Parsing Verilog input from `mulshift_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: sym_mul_map.v Parsing Verilog input from `sym_mul_map.v' to AST representation. Generating RTLIL representation for module `\$mul'. Successfully finished Verilog frontend. 3.2. Executing Verilog-2005 frontend: mulshift_map.v Parsing Verilog input from `mulshift_map.v' to AST representation. Generating RTLIL representation for module `\MYMUL'. Successfully finished Verilog frontend. 3.3. Continuing TECHMAP pass. Using template $paramod$a1bc51c02ce12ac21eb18988e83292af48ed7d72\$mul for cells of type $mul. Using template $paramod$fb3c811cfd9dc2fc74fe40190dfcd365f04584f7\MYMUL for cells of type MYMUL. No more expansions possible. Removed 0 unused cells and 16 unused wires. 4. Generating Graphviz representation of design. 4.1. Executing Verilog-2005 frontend: sym_mul_cells.v Parsing Verilog input from `sym_mul_cells.v' to AST representation. Generating RTLIL representation for module `\MYMUL'. Successfully finished Verilog frontend. 4.2. Continuing show pass. Writing dot description to `mulshift.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'mulshift.dot' > 'mulshift.pdf.new' && mv 'mulshift.pdf.new' 'mulshift.pdf' End of script. Logfile hash: 891a849ce3, CPU: user 0.03s system 0.01s, MEM: 11.90 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 74% 1x show (0 sec), 8% 3x clean (0 sec), ... ../../yosys addshift_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `addshift_test.ys' -- 1. Executing Verilog-2005 frontend: addshift_test.v Parsing Verilog input from `addshift_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: addshift_map.v Parsing Verilog input from `addshift_map.v' to AST representation. Generating RTLIL representation for module `\$add'. Successfully finished Verilog frontend. 3.2. Continuing TECHMAP pass. Using template $paramod$ba28896eb640c0d0dd7116971c6c5dc347170a6c\$add for cells of type $add. No more expansions possible. Removed 0 unused cells and 7 unused wires. 4. Generating Graphviz representation of design. Writing dot description to `addshift.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'addshift.dot' > 'addshift.pdf.new' && mv 'addshift.pdf.new' 'addshift.pdf' End of script. Logfile hash: d1e94967df, CPU: user 0.01s system 0.01s, MEM: 11.33 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 93% 1x show (0 sec), 2% 1x clean (0 sec), ... ../../yosys macc_simple_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `macc_simple_test.ys' -- 1. Executing Verilog-2005 frontend: macc_simple_test.v Parsing Verilog input from `macc_simple_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. Removed 0 unused cells and 1 unused wires. 3. Generating Graphviz representation of design. 3.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 3.2. Continuing show pass. Writing dot description to `macc_simple_test_00a.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'macc_simple_test_00a.dot' > 'macc_simple_test_00a.pdf.new' && mv 'macc_simple_test_00a.pdf.new' 'macc_simple_test_00a.pdf' 4. Executing EXTRACT pass (map subcircuits to cells). 4.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 4.2. Executing PROC pass (convert processes to netlists). 4.2.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 4.2.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 4.2.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 0 assignments to connections. 4.2.4. Executing PROC_INIT pass (extract init attributes). 4.2.5. Executing PROC_ARST pass (detect async resets in processes). 4.2.6. Executing PROC_MUX pass (convert decision trees to multiplexers). 4.2.7. Executing PROC_DLATCH pass (convert process syncs to latches). 4.2.8. Executing PROC_DFF pass (convert process syncs to FFs). 4.2.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 4.2.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 4.2.11. Executing OPT_EXPR pass (perform const folding). Optimizing module macc_16_16_32. 4.3. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \macc_16_16_32.. Removed 0 unused cells and 1 unused wires. 4.4. Creating graphs for SubCircuit library. Creating needle graph needle_macc_16_16_32. Creating haystack graph haystack_test. 4.5. Running solver from SubCircuit library. Solving for needle_macc_16_16_32 in haystack_test. Found 1 matches. 4.6. Substitute SubCircuits with cells. Match #0: (needle_macc_16_16_32 in haystack_test) $add$macc_simple_xmap.v:5$7 -> $add$macc_simple_test.v:5$2 \A:\A \B:\B \Y:\Y $const$0 -> $const$0 \Y:\Y $const$1 -> $const$1 \Y:\Y $const$x -> $const$x \Y:\Y $const$z -> $const$z \Y:\Y $mul$macc_simple_xmap.v:5$6 -> $mul$macc_simple_test.v:5$1 \A:\A \B:\B \Y:\Y new cell: $extract$\macc_16_16_32$8 Removed 0 unused cells and 1 unused wires. 5. Generating Graphviz representation of design. 5.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 5.2. Continuing show pass. Writing dot description to `macc_simple_test_00b.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'macc_simple_test_00b.dot' > 'macc_simple_test_00b.pdf.new' && mv 'macc_simple_test_00b.pdf.new' 'macc_simple_test_00b.pdf' 6. Executing Verilog-2005 frontend: macc_simple_test_01.v Parsing Verilog input from `macc_simple_test_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 7. Executing HIERARCHY pass (managing design hierarchy). 7.1. Analyzing design hierarchy.. Top module: \test 7.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. Removed 0 unused cells and 1 unused wires. 8. Generating Graphviz representation of design. 8.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 8.2. Continuing show pass. Writing dot description to `macc_simple_test_01a.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'macc_simple_test_01a.dot' > 'macc_simple_test_01a.pdf.new' && mv 'macc_simple_test_01a.pdf.new' 'macc_simple_test_01a.pdf' 9. Executing EXTRACT pass (map subcircuits to cells). 9.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 9.2. Executing PROC pass (convert processes to netlists). 9.2.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 9.2.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 9.2.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 0 assignments to connections. 9.2.4. Executing PROC_INIT pass (extract init attributes). 9.2.5. Executing PROC_ARST pass (detect async resets in processes). 9.2.6. Executing PROC_MUX pass (convert decision trees to multiplexers). 9.2.7. Executing PROC_DLATCH pass (convert process syncs to latches). 9.2.8. Executing PROC_DFF pass (convert process syncs to FFs). 9.2.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 9.2.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 9.2.11. Executing OPT_EXPR pass (perform const folding). Optimizing module macc_16_16_32. 9.3. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \macc_16_16_32.. Removed 0 unused cells and 1 unused wires. 9.4. Creating graphs for SubCircuit library. Creating needle graph needle_macc_16_16_32. Creating haystack graph haystack_test. 9.5. Running solver from SubCircuit library. Solving for needle_macc_16_16_32 in haystack_test. Found 1 matches. 9.6. Substitute SubCircuits with cells. Match #0: (needle_macc_16_16_32 in haystack_test) $add$macc_simple_xmap.v:5$18 -> $add$macc_simple_test_01.v:5$13 \A:\A \B:\B \Y:\Y $mul$macc_simple_xmap.v:5$17 -> $mul$macc_simple_test_01.v:5$11 \A:\A \B:\B \Y:\Y new cell: $extract$\macc_16_16_32$19 Removed 0 unused cells and 1 unused wires. 10. Generating Graphviz representation of design. 10.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 10.2. Continuing show pass. Writing dot description to `macc_simple_test_01b.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'macc_simple_test_01b.dot' > 'macc_simple_test_01b.pdf.new' && mv 'macc_simple_test_01b.pdf.new' 'macc_simple_test_01b.pdf' 11. Executing Verilog-2005 frontend: macc_simple_test_02.v Parsing Verilog input from `macc_simple_test_02.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 12. Executing HIERARCHY pass (managing design hierarchy). 12.1. Analyzing design hierarchy.. Top module: \test 12.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. Removed 0 unused cells and 1 unused wires. 13. Generating Graphviz representation of design. 13.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 13.2. Continuing show pass. Writing dot description to `macc_simple_test_02a.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'macc_simple_test_02a.dot' > 'macc_simple_test_02a.pdf.new' && mv 'macc_simple_test_02a.pdf.new' 'macc_simple_test_02a.pdf' 14. Executing EXTRACT pass (map subcircuits to cells). 14.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 14.2. Executing PROC pass (convert processes to netlists). 14.2.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 14.2.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Removed a total of 0 dead cases. 14.2.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 0 assignments to connections. 14.2.4. Executing PROC_INIT pass (extract init attributes). 14.2.5. Executing PROC_ARST pass (detect async resets in processes). 14.2.6. Executing PROC_MUX pass (convert decision trees to multiplexers). 14.2.7. Executing PROC_DLATCH pass (convert process syncs to latches). 14.2.8. Executing PROC_DFF pass (convert process syncs to FFs). 14.2.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 14.2.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 14.2.11. Executing OPT_EXPR pass (perform const folding). Optimizing module macc_16_16_32. 14.3. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \macc_16_16_32.. Removed 0 unused cells and 1 unused wires. 14.4. Creating graphs for SubCircuit library. Creating needle graph needle_macc_16_16_32. Creating haystack graph haystack_test. 14.5. Running solver from SubCircuit library. Solving for needle_macc_16_16_32 in haystack_test. Found 2 matches. 14.6. Substitute SubCircuits with cells. Match #0: (needle_macc_16_16_32 in haystack_test) $add$macc_simple_xmap.v:5$29 -> $add$macc_simple_test_02.v:5$24 \A:\A \B:\B \Y:\Y $mul$macc_simple_xmap.v:5$28 -> $mul$macc_simple_test_02.v:5$23 \A:\A \B:\B \Y:\Y new cell: $extract$\macc_16_16_32$30 Match #1: (needle_macc_16_16_32 in haystack_test) $add$macc_simple_xmap.v:5$29 -> $add$macc_simple_test_02.v:5$25 \A:\A \B:\B \Y:\Y $mul$macc_simple_xmap.v:5$28 -> $mul$macc_simple_test_02.v:5$22 \A:\A \B:\B \Y:\Y new cell: $extract$\macc_16_16_32$31 Removed 0 unused cells and 2 unused wires. 15. Generating Graphviz representation of design. 15.1. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 15.2. Continuing show pass. Writing dot description to `macc_simple_test_02b.dot'. Dumping module test to page 1. Exec: dot -Tpdf 'macc_simple_test_02b.dot' > 'macc_simple_test_02b.pdf.new' && mv 'macc_simple_test_02b.pdf.new' 'macc_simple_test_02b.pdf' 16. Executing Verilog-2005 frontend: macc_simple_xmap.v Parsing Verilog input from `macc_simple_xmap.v' to AST representation. Generating RTLIL representation for module `\macc_16_16_32'. Successfully finished Verilog frontend. 17. Executing HIERARCHY pass (managing design hierarchy). 17.1. Analyzing design hierarchy.. Top module: \macc_16_16_32 17.2. Analyzing design hierarchy.. Top module: \macc_16_16_32 Removed 0 unused modules. Removed 0 unused cells and 1 unused wires. 18. Generating Graphviz representation of design. Writing dot description to `macc_simple_xmap.dot'. Dumping module macc_16_16_32 to page 1. Exec: dot -Tpdf 'macc_simple_xmap.dot' > 'macc_simple_xmap.pdf.new' && mv 'macc_simple_xmap.pdf.new' 'macc_simple_xmap.pdf' End of script. Logfile hash: 87ef763ab0, CPU: user 0.05s system 0.02s, MEM: 11.63 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 92% 7x show (0 sec), 2% 7x clean (0 sec), ... ../../yosys macc_xilinx_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `macc_xilinx_test.ys' -- 1. Executing Verilog-2005 frontend: macc_xilinx_test.v Parsing Verilog input from `macc_xilinx_test.v' to AST representation. Generating RTLIL representation for module `\test1'. Generating RTLIL representation for module `\test2'. Successfully finished Verilog frontend. 2. Executing Verilog-2005 frontend: macc_xilinx_unwrap_map.v Parsing Verilog input from `macc_xilinx_unwrap_map.v' to AST representation. Generating RTLIL representation for module `$__mul_wrapper'. Generating RTLIL representation for module `$__add_wrapper'. Successfully finished Verilog frontend. 3. Executing Verilog-2005 frontend: macc_xilinx_xmap.v Parsing Verilog input from `macc_xilinx_xmap.v' to AST representation. Generating RTLIL representation for module `\DSP48_MACC'. Successfully finished Verilog frontend. 4. Executing HIERARCHY pass (managing design hierarchy). Removed 0 unused cells and 2 unused wires. 5. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test1a.dot'. Dumping module test1 to page 1. Exec: dot -Tpdf 'macc_xilinx_test1a.dot' > 'macc_xilinx_test1a.pdf.new' && mv 'macc_xilinx_test1a.pdf.new' 'macc_xilinx_test1a.pdf' 6. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test2a.dot'. Dumping module test2 to page 1. Exec: dot -Tpdf 'macc_xilinx_test2a.dot' > 'macc_xilinx_test2a.pdf.new' && mv 'macc_xilinx_test2a.pdf.new' 'macc_xilinx_test2a.pdf' 7. Executing TECHMAP pass (map to technology primitives). 7.1. Executing Verilog-2005 frontend: macc_xilinx_swap_map.v Parsing Verilog input from `macc_xilinx_swap_map.v' to AST representation. Generating RTLIL representation for module `\mul_swap_ports'. Successfully finished Verilog frontend. 7.2. Continuing TECHMAP pass. Using template $paramod$cb31b7e2c27e209b1e5fc8ca3c6ec22d65eb4c07\mul_swap_ports for cells of type $mul. No more expansions possible. Removed 0 unused cells and 8 unused wires. 8. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test1b.dot'. Dumping module test1 to page 1. Exec: dot -Tpdf 'macc_xilinx_test1b.dot' > 'macc_xilinx_test1b.pdf.new' && mv 'macc_xilinx_test1b.pdf.new' 'macc_xilinx_test1b.pdf' 9. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test2b.dot'. Dumping module test2 to page 1. Exec: dot -Tpdf 'macc_xilinx_test2b.dot' > 'macc_xilinx_test2b.pdf.new' && mv 'macc_xilinx_test2b.pdf.new' 'macc_xilinx_test2b.pdf' 10. Executing TECHMAP pass (map to technology primitives). 10.1. Executing Verilog-2005 frontend: macc_xilinx_wrap_map.v Parsing Verilog input from `macc_xilinx_wrap_map.v' to AST representation. Generating RTLIL representation for module `\mul_wrap'. Generating RTLIL representation for module `\add_wrap'. Successfully finished Verilog frontend. 10.2. Continuing TECHMAP pass. Using template $paramod$7714b1debbef4f2cb52c6ca29c9bc451325cf285\mul_wrap for cells of type $mul. Using template $paramod$48197a291a9e3825142389e9d2e41385cae2467c\mul_wrap for cells of type $mul. Using template $paramod$7ad0a2715cbe7438acc372ec84186a7c022b6ee1\add_wrap for cells of type $add. No more expansions possible. 11. Executing CONNWRAPPERS pass (connect extended ports of wrapper cells). Connected extended bits of test1.$add$macc_xilinx_test.v:5$5:A: { 6'000000 $add$macc_xilinx_test.v:5$3_Y } -> { $techmap24$add$macc_xilinx_test.v:5$3.Y_48 [47:42] $add$macc_xilinx_test.v:5$3_Y } Connected extended bits of test1.$add$macc_xilinx_test.v:5$5:B: { 6'000000 $mul$macc_xilinx_test.v:5$4_Y } -> { $techmap25$mul$macc_xilinx_test.v:5$4.Y_48 [47:42] $mul$macc_xilinx_test.v:5$4_Y } Connected extended bits of test1.$add$macc_xilinx_test.v:5$3:B: { 6'000000 $mul$macc_xilinx_test.v:5$2_Y } -> { $techmap23$mul$macc_xilinx_test.v:5$2.Y_48 [47:42] $mul$macc_xilinx_test.v:5$2_Y } Connected extended bits of test2.$add$macc_xilinx_test.v:12$10:B: { 6'000000 $add$macc_xilinx_test.v:12$9_Y } -> { $techmap21$add$macc_xilinx_test.v:12$9.Y_48 [47:42] $add$macc_xilinx_test.v:12$9_Y } Connected extended bits of test2.$add$macc_xilinx_test.v:12$9:A: { 6'000000 $mul$macc_xilinx_test.v:12$7_Y } -> { $techmap19$mul$macc_xilinx_test.v:12$7.Y_48 [47:42] $mul$macc_xilinx_test.v:12$7_Y } Connected extended bits of test2.$add$macc_xilinx_test.v:12$9:B: { 6'000000 $mul$macc_xilinx_test.v:12$8_Y } -> { $techmap17$mul$macc_xilinx_test.v:12$8.Y_48 [47:42] $mul$macc_xilinx_test.v:12$8_Y } Removed 0 unused cells and 56 unused wires. 12. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test1c.dot'. Dumping module test1 to page 1. Exec: dot -Tpdf 'macc_xilinx_test1c.dot' > 'macc_xilinx_test1c.pdf.new' && mv 'macc_xilinx_test1c.pdf.new' 'macc_xilinx_test1c.pdf' 13. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test2c.dot'. Dumping module test2 to page 1. Exec: dot -Tpdf 'macc_xilinx_test2c.dot' > 'macc_xilinx_test2c.pdf.new' && mv 'macc_xilinx_test2c.pdf.new' 'macc_xilinx_test2c.pdf' 14. Executing Verilog-2005 frontend: macc_xilinx_xmap.v Parsing Verilog input from `macc_xilinx_xmap.v' to AST representation. Generating RTLIL representation for module `\DSP48_MACC'. Successfully finished Verilog frontend. 15. Executing TECHMAP pass (map to technology primitives). 15.1. Executing Verilog-2005 frontend: macc_xilinx_swap_map.v Parsing Verilog input from `macc_xilinx_swap_map.v' to AST representation. Generating RTLIL representation for module `\mul_swap_ports'. Successfully finished Verilog frontend. 15.2. Continuing TECHMAP pass. No more expansions possible. 16. Executing TECHMAP pass (map to technology primitives). 16.1. Executing Verilog-2005 frontend: macc_xilinx_wrap_map.v Parsing Verilog input from `macc_xilinx_wrap_map.v' to AST representation. Generating RTLIL representation for module `\mul_wrap'. Generating RTLIL representation for module `\add_wrap'. Successfully finished Verilog frontend. 16.2. Continuing TECHMAP pass. Using template $paramod$81421da67e3cf07e7ac8b39f28efc75ee750e82a\mul_wrap for cells of type $mul. Using template $paramod$88aad6f8473fb7e4e5fbfb8335ddebad03429eaa\add_wrap for cells of type $add. No more expansions possible. Removed 0 unused cells and 17 unused wires. 17. Executing EXTRACT pass (map subcircuits to cells). 17.1. Creating graphs for SubCircuit library. Creating needle graph needle_DSP48_MACC. Creating haystack graph haystack_$__add_wrapper. Creating haystack graph haystack_$__mul_wrapper. Creating haystack graph haystack_DSP48_MACC. Creating haystack graph haystack_test1. Creating haystack graph haystack_test2. 17.2. Running solver from SubCircuit library. Solving for needle_DSP48_MACC in haystack_$__add_wrapper. Solving for needle_DSP48_MACC in haystack_$__mul_wrapper. Solving for needle_DSP48_MACC in haystack_DSP48_MACC. Solving for needle_DSP48_MACC in haystack_test1. Solving for needle_DSP48_MACC in haystack_test2. Found 3 matches. 17.3. Substitute SubCircuits with cells. Match #0: (needle_DSP48_MACC in haystack_test1) $add$macc_xilinx_xmap.v:8$28 -> $add$macc_xilinx_test.v:5$3 \A:\B \B:\A \Y:\Y $const$0 -> $const$0 \Y:\Y $const$1 -> $const$1 \Y:\Y $const$x -> $const$x \Y:\Y $const$z -> $const$z \Y:\Y $mul$macc_xilinx_xmap.v:8$27 -> $mul$macc_xilinx_test.v:5$2 \A:\A \B:\B \Y:\Y new cell: $extract$\DSP48_MACC$35 Match #1: (needle_DSP48_MACC in haystack_test1) $add$macc_xilinx_xmap.v:8$28 -> $add$macc_xilinx_test.v:5$5 \A:\B \B:\A \Y:\Y $const$0 -> $const$0 \Y:\Y $const$1 -> $const$1 \Y:\Y $const$x -> $const$x \Y:\Y $const$z -> $const$z \Y:\Y $mul$macc_xilinx_xmap.v:8$27 -> $mul$macc_xilinx_test.v:5$4 \A:\A \B:\B \Y:\Y new cell: $extract$\DSP48_MACC$36 Match #2: (needle_DSP48_MACC in haystack_test2) $add$macc_xilinx_xmap.v:8$28 -> $add$macc_xilinx_test.v:12$9 \A:\A \B:\B \Y:\Y $const$0 -> $const$0 \Y:\Y $const$1 -> $const$1 \Y:\Y $const$x -> $const$x \Y:\Y $const$z -> $const$z \Y:\Y $mul$macc_xilinx_xmap.v:8$27 -> $mul$macc_xilinx_test.v:12$7 \A:\A \B:\B \Y:\Y new cell: $extract$\DSP48_MACC$37 Removed 0 unused cells and 6 unused wires. 18. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test1d.dot'. Dumping module test1 to page 1. Exec: dot -Tpdf 'macc_xilinx_test1d.dot' > 'macc_xilinx_test1d.pdf.new' && mv 'macc_xilinx_test1d.pdf.new' 'macc_xilinx_test1d.pdf' 19. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test2d.dot'. Dumping module test2 to page 1. Exec: dot -Tpdf 'macc_xilinx_test2d.dot' > 'macc_xilinx_test2d.pdf.new' && mv 'macc_xilinx_test2d.pdf.new' 'macc_xilinx_test2d.pdf' 20. Executing TECHMAP pass (map to technology primitives). 20.1. Executing Verilog-2005 frontend: macc_xilinx_unwrap_map.v Parsing Verilog input from `macc_xilinx_unwrap_map.v' to AST representation. Generating RTLIL representation for module `\$__mul_wrapper'. Generating RTLIL representation for module `\$__add_wrapper'. Successfully finished Verilog frontend. 20.2. Continuing TECHMAP pass. Using template $paramod$7714b1debbef4f2cb52c6ca29c9bc451325cf285\$__mul_wrapper for cells of type $__mul_wrapper. Using template $paramod$7ad0a2715cbe7438acc372ec84186a7c022b6ee1\$__add_wrapper for cells of type $__add_wrapper. No more expansions possible. Removed 0 unused cells and 14 unused wires. 21. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test1e.dot'. Dumping module test1 to page 1. Exec: dot -Tpdf 'macc_xilinx_test1e.dot' > 'macc_xilinx_test1e.pdf.new' && mv 'macc_xilinx_test1e.pdf.new' 'macc_xilinx_test1e.pdf' 22. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_test2e.dot'. Dumping module test2 to page 1. Exec: dot -Tpdf 'macc_xilinx_test2e.dot' > 'macc_xilinx_test2e.pdf.new' && mv 'macc_xilinx_test2e.pdf.new' 'macc_xilinx_test2e.pdf' 23. Generating Graphviz representation of design. Writing dot description to `macc_xilinx_xmap.dot'. Dumping module DSP48_MACC to page 1. Exec: dot -Tpdf 'macc_xilinx_xmap.dot' > 'macc_xilinx_xmap.pdf.new' && mv 'macc_xilinx_xmap.pdf.new' 'macc_xilinx_xmap.pdf' End of script. Logfile hash: 30f24e3366, CPU: user 0.15s system 0.02s, MEM: 12.86 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 88% 11x show (0 sec), 5% 12x clean (0 sec), ... make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_ExAdv' + make -C PRESENTATION_ExOth make[1]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_ExOth' ../../yosys scrambler.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `scrambler.ys' -- 1. Executing Verilog-2005 frontend: scrambler.v Parsing Verilog input from `scrambler.v' to AST representation. Generating RTLIL representation for module `\scrambler'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 3. Executing PROC pass (convert processes to netlists). 3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 1 switch rules as full_case in process $proc$scrambler.v:6$1 in module scrambler. Removed a total of 0 dead cases. 3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 2 assignments to connections. 3.4. Executing PROC_INIT pass (extract init attributes). 3.5. Executing PROC_ARST pass (detect async resets in processes). 3.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\scrambler.$proc$scrambler.v:6$1'. 1/1: $1\xs[31:0] 3.7. Executing PROC_DLATCH pass (convert process syncs to latches). 3.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\scrambler.\out_bit' using process `\scrambler.$proc$scrambler.v:6$1'. created $dff cell `$procdff$12' with positive edge clock. Creating register for signal `\scrambler.\xs' using process `\scrambler.$proc$scrambler.v:6$1'. created $dff cell `$procdff$13' with positive edge clock. 3.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 3.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Found and cleaned up 1 empty switch in `\scrambler.$proc$scrambler.v:6$1'. Removing empty process `scrambler.$proc$scrambler.v:6$1'. Cleaned up 1 empty switch. 3.11. Executing OPT_EXPR pass (perform const folding). Optimizing module scrambler. Removed 0 unused cells and 5 unused wires. 4. Executing SUBMOD pass (moving cells to submodules as requested). 4.1. Executing OPT_CLEAN pass (remove unused cells and wires). Finding unused cells or wires in module \scrambler.. 4.2. Continuing SUBMOD pass. Creating submodule xorshift32 (\xorshift32) of module \scrambler. signal $shl$scrambler.v:11$6_Y: internal signal $0\xs[31:0]: output \n1 signal $1\xs[31:0]: input \n2 signal $xor$scrambler.v:9$3_Y: internal signal $shr$scrambler.v:10$4_Y: internal signal $xor$scrambler.v:10$5_Y: internal cell $xor$scrambler.v:9$3 ($xor) cell $xor$scrambler.v:11$7 ($xor) cell $xor$scrambler.v:10$5 ($xor) 5. Generating Graphviz representation of design. Writing dot description to `scrambler_p01.dot'. Dumping module scrambler to page 1. Exec: dot -Tpdf 'scrambler_p01.dot' > 'scrambler_p01.pdf.new' && mv 'scrambler_p01.pdf.new' 'scrambler_p01.pdf' 6. Generating Graphviz representation of design. Writing dot description to `scrambler_p02.dot'. Dumping module xorshift32 to page 1. Exec: dot -Tpdf 'scrambler_p02.dot' > 'scrambler_p02.pdf.new' && mv 'scrambler_p02.pdf.new' 'scrambler_p02.pdf' echo on yosys> cd xorshift32 yosys [xorshift32]> rename n2 in Renaming wire n2 to in in module xorshift32. yosys [xorshift32]> rename n1 out Renaming wire n1 to out in module xorshift32. yosys [xorshift32]> eval -set in 1 -show out 7. Executing EVAL pass (evaluate the circuit given an input). Eval result: \out = 270369. yosys [xorshift32]> eval -set in 270369 -show out 8. Executing EVAL pass (evaluate the circuit given an input). Eval result: \out = 67634689. yosys [xorshift32]> sat -set out 632435482 9. Executing SAT pass (solving SAT problems in the circuit). Setting up SAT problem: Import set-constraint: \out = 632435482 Final constraint equation: \out = 632435482 Imported 3 cells to SAT database. Solving problem with 665 variables and 1735 clauses.. SAT solving finished - model found: Signal Name Dec Hex Bin --------------- ----------- --------- ----------------------------------- \in 745495504 2c6f5bd0 00101100011011110101101111010000 \out 632435482 25b2331a 00100101101100100011001100011010 End of script. Logfile hash: 05b8ff49c3, CPU: user 0.04s system 0.00s, MEM: 12.14 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 87% 2x show (0 sec), 3% 1x sat (0 sec), ... ../../yosys -l equiv.log_new equiv.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `equiv.ys' -- 1. Executing Verilog-2005 frontend: ../PRESENTATION_ExSyn/techmap_01.v Parsing Verilog input from `../PRESENTATION_ExSyn/techmap_01.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. 2. Executing HIERARCHY pass (managing design hierarchy). 2.1. Analyzing design hierarchy.. Top module: \test 2.2. Analyzing design hierarchy.. Top module: \test Removed 0 unused modules. Renaming module \test to \test_mapped. 3. Executing TECHMAP pass (map to technology primitives). 3.1. Executing Verilog-2005 frontend: ../PRESENTATION_ExSyn/techmap_01_map.v Parsing Verilog input from `../PRESENTATION_ExSyn/techmap_01_map.v' to AST representation. Generating RTLIL representation for module `\$add'. Successfully finished Verilog frontend. 3.2. Continuing TECHMAP pass. Using template $paramod$fbc7873bff55778c0b3173955b7e4bce1d9d6834\$add for cells of type $add. No more expansions possible. 4. Executing MITER pass (creating miter circuit). Creating miter cell "miter" with gold cell "test_orig" and gate cell "test_mapped". 5. Executing FLATTEN pass (flatten design). 6. Executing SAT pass (solving SAT problems in the circuit). Setting up SAT problem: Final constraint equation: { } = { } Imported 7 cells to SAT database. Import proof for assert: $auto$miter.cc:207:create_miter_equiv$6 when 1'1. Import show expression: \in_b Import show expression: \in_a Import show expression: \trigger Import show expression: \gate_y Import show expression: \gold_y Solving problem with 945 variables and 2505 clauses.. SAT proof finished - no model found: SUCCESS! /$$$$$$ /$$$$$$$$ /$$$$$$$ /$$__ $$ | $$_____/ | $$__ $$ | $$ \ $$ | $$ | $$ \ $$ | $$ | $$ | $$$$$ | $$ | $$ | $$ | $$ | $$__/ | $$ | $$ | $$/$$ $$ | $$ | $$ | $$ | $$$$$$/ /$$| $$$$$$$$ /$$| $$$$$$$//$$ \____ $$$|__/|________/|__/|_______/|__/ \__/ End of script. Logfile hash: d222a819ed, CPU: user 0.03s system 0.01s, MEM: 12.05 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 69% 1x sat (0 sec), 17% 1x techmap (0 sec), ... mv equiv.log_new equiv.log ../../yosys -l axis_test.log_new axis_test.ys /----------------------------------------------------------------------------\ | | | yosys -- Yosys Open SYnthesis Suite | | | | Copyright (C) 2012 - 2020 Claire Xenia Wolf | | | | Permission to use, copy, modify, and/or distribute this software for any | | purpose with or without fee is hereby granted, provided that the above | | copyright notice and this permission notice appear in all copies. | | | | THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | | \----------------------------------------------------------------------------/ Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) -- Executing script file `axis_test.ys' -- 1. Executing Verilog-2005 frontend: axis_master.v Parsing SystemVerilog input from `axis_master.v' to AST representation. Generating RTLIL representation for module `\axis_master'. Successfully finished Verilog frontend. 2. Executing Verilog-2005 frontend: axis_test.v Parsing SystemVerilog input from `axis_test.v' to AST representation. Generating RTLIL representation for module `\axis_test'. Successfully finished Verilog frontend. 3. Executing HIERARCHY pass (managing design hierarchy). 3.1. Analyzing design hierarchy.. Top module: \axis_test Used module: \axis_master 3.2. Analyzing design hierarchy.. Top module: \axis_test Used module: \axis_master Removed 0 unused modules. Module axis_test directly or indirectly contains formal properties -> setting "keep" attribute. Mapping positional arguments of cell axis_test.uut (axis_master). 4. Executing PROC pass (convert processes to netlists). 4.1. Executing PROC_CLEAN pass (remove empty switches from decision trees). Cleaned up 0 empty switches. 4.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees). Marked 2 switch rules as full_case in process $proc$axis_master.v:7$1 in module axis_master. Removed a total of 0 dead cases. 4.3. Executing PROC_PRUNE pass (remove redundant assignments in processes). Removed 0 redundant assignments. Promoted 14 assignments to connections. 4.4. Executing PROC_INIT pass (extract init attributes). Found init rule in `\axis_test.$proc$axis_test.v:0$98'. Set init value: $formal$axis_test.v:22$23_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$96'. Set init value: $formal$axis_test.v:21$22_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$94'. Set init value: $formal$axis_test.v:20$21_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$92'. Set init value: $formal$axis_test.v:19$20_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$90'. Set init value: $formal$axis_test.v:18$19_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$88'. Set init value: $formal$axis_test.v:17$18_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$86'. Set init value: $formal$axis_test.v:16$17_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$84'. Set init value: $formal$axis_test.v:15$16_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$82'. Set init value: $formal$axis_test.v:14$15_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:0$80'. Set init value: $formal$axis_test.v:13$14_EN = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:7$79'. Set init value: \aresetn = 1'0 Found init rule in `\axis_test.$proc$axis_test.v:6$78'. Set init value: \counter = 0 4.5. Executing PROC_ARST pass (detect async resets in processes). 4.6. Executing PROC_MUX pass (convert decision trees to multiplexers). Creating decoders for process `\axis_test.$proc$axis_test.v:0$98'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$96'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$94'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$92'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$90'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$88'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$86'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$84'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$82'. Creating decoders for process `\axis_test.$proc$axis_test.v:0$80'. Creating decoders for process `\axis_test.$proc$axis_test.v:7$79'. Creating decoders for process `\axis_test.$proc$axis_test.v:6$78'. Creating decoders for process `\axis_test.$proc$axis_test.v:11$24'. 1/21: $0$formal$axis_test.v:13$14_EN[0:0]$26 2/21: $0$formal$axis_test.v:13$14_CHECK[0:0]$25 3/21: $0$formal$axis_test.v:14$15_EN[0:0]$28 4/21: $0$formal$axis_test.v:14$15_CHECK[0:0]$27 5/21: $0$formal$axis_test.v:15$16_EN[0:0]$30 6/21: $0$formal$axis_test.v:15$16_CHECK[0:0]$29 7/21: $0$formal$axis_test.v:16$17_EN[0:0]$32 8/21: $0$formal$axis_test.v:16$17_CHECK[0:0]$31 9/21: $0$formal$axis_test.v:17$18_EN[0:0]$34 10/21: $0$formal$axis_test.v:17$18_CHECK[0:0]$33 11/21: $0$formal$axis_test.v:18$19_EN[0:0]$36 12/21: $0$formal$axis_test.v:18$19_CHECK[0:0]$35 13/21: $0$formal$axis_test.v:19$20_EN[0:0]$38 14/21: $0$formal$axis_test.v:19$20_CHECK[0:0]$37 15/21: $0$formal$axis_test.v:20$21_EN[0:0]$40 16/21: $0$formal$axis_test.v:20$21_CHECK[0:0]$39 17/21: $0$formal$axis_test.v:21$22_EN[0:0]$42 18/21: $0$formal$axis_test.v:21$22_CHECK[0:0]$41 19/21: $0$formal$axis_test.v:22$23_EN[0:0]$44 20/21: $0$formal$axis_test.v:22$23_CHECK[0:0]$43 21/21: $0\counter[31:0] Creating decoders for process `\axis_master.$proc$axis_master.v:7$1'. 1/4: $2\state[31:0] 2/4: $1\state[31:0] 3/4: $0\tdata[7:0] 4/4: $0\tvalid[0:0] 4.7. Executing PROC_DLATCH pass (convert process syncs to latches). 4.8. Executing PROC_DFF pass (convert process syncs to FFs). Creating register for signal `\axis_test.\aresetn' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$209' with positive edge clock. Creating register for signal `\axis_test.\counter' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$210' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:13$14_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$211' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:13$14_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$212' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:14$15_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$213' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:14$15_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$214' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:15$16_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$215' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:15$16_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$216' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:16$17_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$217' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:16$17_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$218' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:17$18_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$219' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:17$18_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$220' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:18$19_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$221' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:18$19_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$222' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:19$20_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$223' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:19$20_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$224' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:20$21_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$225' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:20$21_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$226' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:21$22_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$227' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:21$22_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$228' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:22$23_CHECK' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$229' with positive edge clock. Creating register for signal `\axis_test.$formal$axis_test.v:22$23_EN' using process `\axis_test.$proc$axis_test.v:11$24'. created $dff cell `$procdff$230' with positive edge clock. Creating register for signal `\axis_master.\tvalid' using process `\axis_master.$proc$axis_master.v:7$1'. created $dff cell `$procdff$231' with positive edge clock. Creating register for signal `\axis_master.\tdata' using process `\axis_master.$proc$axis_master.v:7$1'. created $dff cell `$procdff$232' with positive edge clock. Creating register for signal `\axis_master.\state' using process `\axis_master.$proc$axis_master.v:7$1'. created $dff cell `$procdff$233' with positive edge clock. 4.9. Executing PROC_MEMWR pass (convert process memory writes to cells). 4.10. Executing PROC_CLEAN pass (remove empty switches from decision trees). Removing empty process `axis_test.$proc$axis_test.v:0$98'. Removing empty process `axis_test.$proc$axis_test.v:0$96'. Removing empty process `axis_test.$proc$axis_test.v:0$94'. Removing empty process `axis_test.$proc$axis_test.v:0$92'. Removing empty process `axis_test.$proc$axis_test.v:0$90'. Removing empty process `axis_test.$proc$axis_test.v:0$88'. Removing empty process `axis_test.$proc$axis_test.v:0$86'. Removing empty process `axis_test.$proc$axis_test.v:0$84'. Removing empty process `axis_test.$proc$axis_test.v:0$82'. Removing empty process `axis_test.$proc$axis_test.v:0$80'. Removing empty process `axis_test.$proc$axis_test.v:7$79'. Removing empty process `axis_test.$proc$axis_test.v:6$78'. Found and cleaned up 11 empty switches in `\axis_test.$proc$axis_test.v:11$24'. Removing empty process `axis_test.$proc$axis_test.v:11$24'. Found and cleaned up 4 empty switches in `\axis_master.$proc$axis_master.v:7$1'. Removing empty process `axis_master.$proc$axis_master.v:7$1'. Cleaned up 15 empty switches. 4.11. Executing OPT_EXPR pass (perform const folding). Optimizing module axis_test. Optimizing module axis_master. 5. Executing FLATTEN pass (flatten design). Deleting now unused module axis_master. Removed 1 unused cells and 92 unused wires. 6. Executing SAT pass (solving SAT problems in the circuit). Setting up time step 1: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import set-constraint from init attribute: $formal$axis_test.v:13$14_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:14$15_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:15$16_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:16$17_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:17$18_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:18$19_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:19$20_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:20$21_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:21$22_EN = 1'0 Import set-constraint from init attribute: $formal$axis_test.v:22$23_EN = 1'0 Import set-constraint from init attribute: \aresetn = 1'0 Import set-constraint from init attribute: \counter = 0 Final init constraint equation: { \counter \aresetn $formal$axis_test.v:22$23_EN $formal$axis_test.v:21$22_EN $formal$axis_test.v:20$21_EN $formal$axis_test.v:19$20_EN $formal$axis_test.v:18$19_EN $formal$axis_test.v:17$18_EN $formal$axis_test.v:16$17_EN $formal$axis_test.v:15$16_EN $formal$axis_test.v:14$15_EN $formal$axis_test.v:13$14_EN } = 43'0000000000000000000000000000000000000000000 Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 2: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 3: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 4: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 5: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 6: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 7: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 8: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 9: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 10: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 11: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 12: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 13: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 14: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 15: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 16: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 17: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 18: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 19: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 20: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 21: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 22: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 23: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 24: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 25: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 26: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 27: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 28: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 29: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 30: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 31: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 32: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 33: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 34: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 35: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 36: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 37: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 38: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 39: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 40: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 41: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 42: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 43: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 44: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 45: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 46: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 47: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 48: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 49: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Setting up time step 50: Final constraint equation: { } = { } Imported 117 cells to SAT database. Import proof for assert: $formal$axis_test.v:13$14_CHECK when $formal$axis_test.v:13$14_EN. Import proof for assert: $formal$axis_test.v:14$15_CHECK when $formal$axis_test.v:14$15_EN. Import proof for assert: $formal$axis_test.v:15$16_CHECK when $formal$axis_test.v:15$16_EN. Import proof for assert: $formal$axis_test.v:16$17_CHECK when $formal$axis_test.v:16$17_EN. Import proof for assert: $formal$axis_test.v:17$18_CHECK when $formal$axis_test.v:17$18_EN. Import proof for assert: $formal$axis_test.v:18$19_CHECK when $formal$axis_test.v:18$19_EN. Import proof for assert: $formal$axis_test.v:19$20_CHECK when $formal$axis_test.v:19$20_EN. Import proof for assert: $formal$axis_test.v:20$21_CHECK when $formal$axis_test.v:20$21_EN. Import proof for assert: $formal$axis_test.v:21$22_CHECK when $formal$axis_test.v:21$22_EN. Import proof for assert: $formal$axis_test.v:22$23_CHECK when $formal$axis_test.v:22$23_EN. Solving problem with 135995 variables and 381779 clauses.. SAT proof finished - model found: FAIL! ______ ___ ___ _ _ _ _ (_____ \ / __) / __) (_) | | | | _____) )___ ___ ___ _| |__ _| |__ _____ _| | _____ __| | | | ____/ ___) _ \ / _ (_ __) (_ __|____ | | || ___ |/ _ |_| | | | | | |_| | |_| || | | | / ___ | | || ____( (_| |_ |_| |_| \___/ \___/ |_| |_| \_____|_|\_)_____)\____|_| Time Signal Name Dec Hex Bin ---- ------------------------------------ ----------- --------- ----------------------------------- init $formal$axis_test.v:13$14_CHECK 0 0 0 init $formal$axis_test.v:13$14_EN 0 0 0 init $formal$axis_test.v:14$15_CHECK 0 0 0 init $formal$axis_test.v:14$15_EN 0 0 0 init $formal$axis_test.v:15$16_CHECK 0 0 0 init $formal$axis_test.v:15$16_EN 0 0 0 init $formal$axis_test.v:16$17_CHECK 0 0 0 init $formal$axis_test.v:16$17_EN 0 0 0 init $formal$axis_test.v:17$18_CHECK 0 0 0 init $formal$axis_test.v:17$18_EN 0 0 0 init $formal$axis_test.v:18$19_CHECK 0 0 0 init $formal$axis_test.v:18$19_EN 0 0 0 init $formal$axis_test.v:19$20_CHECK 0 0 0 init $formal$axis_test.v:19$20_EN 0 0 0 init $formal$axis_test.v:20$21_CHECK 0 0 0 init $formal$axis_test.v:20$21_EN 0 0 0 init $formal$axis_test.v:21$22_CHECK 0 0 0 init $formal$axis_test.v:21$22_EN 0 0 0 init $formal$axis_test.v:22$23_CHECK 0 0 0 init $formal$axis_test.v:22$23_EN 0 0 0 init \aresetn 0 0 0 init \counter 0 0 00000000000000000000000000000000 init \uut.state 0 0 00000000000000000000000000000000 init \uut.tdata 64 40 01000000 init \uut.tvalid 1 1 1 End of script. Logfile hash: b0d6f79805, CPU: user 2.38s system 0.15s, MEM: 125.77 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 98% 1x sat (2 sec), 0% 3x read_verilog (0 sec), ... mv axis_test.log_new axis_test.log make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_ExOth' + make -C PRESENTATION_Prog make[1]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_Prog' ../../yosys-config --exec --cxx -O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -Wall -Wextra -ggdb -I/usr/include/yosys -MD -MP -D_YOSYS_ -fPIC -I/usr/include -std=c++11 -Os -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_ABC -DYOSYS_ENABLE_COVER -I../.. --ldflags -o my_cmd.so -shared my_cmd.cc --ldlibs my_cmd.cc: In member function 'virtual void {anonymous}::MyPass::execute(std::vector >, Yosys::RTLIL::Design*)': my_cmd.cc:17:26: warning: format '%zd' expects argument of type 'signed size_t', but argument 3 has type 'int' [-Wformat=] 17 | log(" %s (%zd wires, %zd cells)\n", log_id(mod), | ~~^ | | | long int | %d 18 | GetSize(mod->wires()), GetSize(mod->cells())); | ~~~~~~~~~~~~~~~~~~~~~ | | | int my_cmd.cc:17:37: warning: format '%zd' expects argument of type 'signed size_t', but argument 4 has type 'int' [-Wformat=] 17 | log(" %s (%zd wires, %zd cells)\n", log_id(mod), | ~~^ | | | long int | %d 18 | GetSize(mod->wires()), GetSize(mod->cells())); | ~~~~~~~~~~~~~~~~~~~~~ | | | int ../../yosys -Ql test0.log_new -m ./my_cmd.so -p 'my_cmd foo bar' absval_ref.v -- Parsing `absval_ref.v' using frontend `verilog' -- 1. Executing Verilog-2005 frontend: absval_ref.v Parsing Verilog input from `absval_ref.v' to AST representation. Generating RTLIL representation for module `\absval_ref'. Successfully finished Verilog frontend. -- Running command `my_cmd foo bar' -- Arguments to my_cmd: my_cmd foo bar Modules in current design: absval_ref (4 wires, 2 cells) End of script. Logfile hash: be47de2266, CPU: user 0.00s system 0.01s, MEM: 11.13 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 97% 1x read_verilog (0 sec), 2% 1x my_cmd (0 sec) mv test0.log_new test0.log ../../yosys -Ql test1.log_new -m ./my_cmd.so -p 'clean; test1; dump' absval_ref.v -- Parsing `absval_ref.v' using frontend `verilog' -- 1. Executing Verilog-2005 frontend: absval_ref.v Parsing Verilog input from `absval_ref.v' to AST representation. Generating RTLIL representation for module `\absval_ref'. Successfully finished Verilog frontend. -- Running command `clean; test1; dump' -- Removed 0 unused cells and 1 unused wires. Name of this module: absval autoidx 6 module \absval wire width 4 $auto$my_cmd.cc:41:execute$3 wire width 4 output 2 \y wire width 4 input 1 \a cell $mux $auto$my_cmd.cc:43:execute$5 parameter \WIDTH 4 connect \Y \y connect \S \a [3] connect \B $auto$my_cmd.cc:41:execute$3 connect \A \a end cell $neg $auto$my_cmd.cc:42:execute$4 parameter \Y_WIDTH 4 parameter \A_WIDTH 4 parameter \A_SIGNED 1 connect \Y $auto$my_cmd.cc:41:execute$3 connect \A \a end end attribute \cells_not_processed 1 attribute \src "absval_ref.v:1.1-3.10" module \absval_ref attribute \src "absval_ref.v:2.23-2.25" wire width 4 signed $neg$absval_ref.v:2$1_Y attribute \src "absval_ref.v:1.38-1.39" wire width 4 input 1 signed \a attribute \src "absval_ref.v:1.54-1.55" wire width 4 output 2 \y attribute \src "absval_ref.v:2.23-2.25" cell $neg $neg$absval_ref.v:2$1 parameter \A_SIGNED 1 parameter \A_WIDTH 4 parameter \Y_WIDTH 4 connect \A \a connect \Y $neg$absval_ref.v:2$1_Y end attribute \src "absval_ref.v:2.16-2.29" cell $mux $ternary$absval_ref.v:2$2 parameter \WIDTH 4 connect \A \a connect \B $neg$absval_ref.v:2$1_Y connect \S \a [3] connect \Y \y end end End of script. Logfile hash: 1a9e6a580e, CPU: user 0.00s system 0.01s, MEM: 11.13 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 64% 1x clean (0 sec), 26% 1x read_verilog (0 sec), ... mv test1.log_new test1.log ../../yosys -Ql test2.log_new -m ./my_cmd.so -p 'test2' sigmap_test.v -- Parsing `sigmap_test.v' using frontend `verilog' -- 1. Executing Verilog-2005 frontend: sigmap_test.v Parsing Verilog input from `sigmap_test.v' to AST representation. Generating RTLIL representation for module `\test'. Successfully finished Verilog frontend. -- Running command `test2' -- 0 0 0 1 1 1 Mapped signal x: \a 2. Doing important stuff! Log message #0. Log message #1. Log message #2. Log message #3. Log message #4. Log message #5. Log message #6. Log message #7. Log message #8. Log message #9. End of script. Logfile hash: c613caebe8, CPU: user 0.01s system 0.00s, MEM: 11.12 MB peak Yosys 0.12+3 (git sha1 UNKNOWN, gcc 11.2.1 -O2 -fexceptions -fstack-protector-strong -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -fPIC -Os) Time spent: 83% 1x read_verilog (0 sec), 16% 1x test2 (0 sec) mv test2.log_new test2.log make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/manual/PRESENTATION_Prog' + set -ex + pdflatex -shell-escape -halt-on-error presentation.tex This is pdfTeX, Version 3.141592653-2.6-1.40.22 (TeX Live 2021) (preloaded format=pdflatex) \write18 enabled. entering extended mode (./presentation.tex LaTeX2e <2020-10-01> patch level 4 L3 programming layer <2021-05-07> (/usr/share/texlive/texmf-dist/tex/latex/beamer/beamer.cls Document Class: beamer 2021/03/19 v3.62 A class for typesetting presentations (/usr/share/texlive/texmf-dist/tex/latex/beamer/beamerbasemodes.sty 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duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbi' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmro' already exists, duplicates ignor ed }] [2] [3] [4] (./PRESENTATION_Intro.tex [5] [6] [7] [8] [9] [10] [11] [12] [13] (/usr/share/texlive/texmf-dist/tex/latex/libertine/OT1LinuxBiolinumT-TLF.fd) (/usr/share/texlive/texmf-dist/tex/latex/lm/omllmm.fd) (/usr/share/texlive/texmf-dist/tex/latex/lm/omslmsy.fd) (/usr/share/texlive/texmf-dist/tex/latex/lm/omxlmex.fd) (/usr/share/texlive/texmf-dist/tex/latex/amsfonts/umsa.fd) (/usr/share/texlive/texmf-dist/tex/latex/amsfonts/umsb.fd) (/usr/share/texlive/texmf-dist/tex/latex/libertine/T1LinuxLibertineMonoT-TLF.fd ) [14] [15] [16] [17] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 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pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pcrr8rn': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvb8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvb8yn' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvbo8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvbo8yn' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `phvr8y' already exists, duplicates ignored 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pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pncr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pncri8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pncro8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplb8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplbi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplbo8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplbu8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplr8yn': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pplri8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplro8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplrr8ye': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `pplru8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmb8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmbi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmbo8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmr8y' already exists, duplicates ignored pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmr8yn': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `ptmri8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmro8y': SlantFont/ExtendFont can be used only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `ptmrr8ye': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplbi' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `rpxpplbo': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rpxpplri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): invalid entry for `rpxpplro': SlantFont/ExtendFont can be use d only with embedded Type1 fonts pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `pzcmi8y' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxphvro' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmb' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbi' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmbo' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmr' already exists, duplicates ignore d pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmri' already exists, duplicates ignor ed pdfTeX warning: pdflatex (file /usr/share/texlive/texmf-var/fonts/map/pdftex/up dmap/pdftex.map): fontmap entry for `rtxptmro' already exists, duplicates ignor ed }] [2] [3] [4] (./PRESENTATION_Intro.tex [5] [6] [7] [8] [9] [10] [11] [12] [13] (/usr/share/texlive/texmf-dist/tex/latex/libertine/OT1LinuxBiolinumT-TLF.fd) (/usr/share/texlive/texmf-dist/tex/latex/lm/omllmm.fd) (/usr/share/texlive/texmf-dist/tex/latex/lm/omslmsy.fd) (/usr/share/texlive/texmf-dist/tex/latex/lm/omxlmex.fd) (/usr/share/texlive/texmf-dist/tex/latex/amsfonts/umsa.fd) (/usr/share/texlive/texmf-dist/tex/latex/amsfonts/umsb.fd) (/usr/share/texlive/texmf-dist/tex/latex/libertine/T1LinuxLibertineMonoT-TLF.fd ) [14] [15] [16] [17] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [18] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [19] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [20] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [21] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [22] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [23] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [24] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [25] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [26] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [27] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Overfull \hbox (13.33607pt too wide) in paragraph at lines 368--368 [][][][][][][][] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [28] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [29] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [30] Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping to internal cell Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping flip-flops to Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 dfflibmap -liberty Underfull \hbox (badness 10000) in paragraph at lines 368--368 []\T1/LinuxLibertineMonoT-TLF/regular/n/8 # mapping logic to [31] (./presentation.vrb (/usr/share/texlive/texmf-dist/tex/latex/listings/lstlang1.sty) (/usr/share/texlive/texmf-dist/tex/latex/listings/lstlang2.sty) (/usr/share/texlive/texmf-dist/tex/latex/listings/lstlang3.sty) (./PRESENTATION_Intro/counter.v)) [32] (./presentation.vrb (./PRESENTATION_Intro/mycells.lib Overfull \hbox (11.33778pt too wide) in paragraph at lines 4--5 [][][][][][][][][][][][][][][][][] Overfull \hbox (6.53773pt too wide) in paragraph at lines 5--6 [][][][][][][][][][][][][][][] Overfull \hbox (1.73769pt too wide) in paragraph at lines 6--7 [][][][][][][][][][][][] Overfull \hbox (11.33778pt too wide) in paragraph at lines 10--11 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LaTeX Warning: Reference `fig:Verilog_flow' on page 54 undefined on input line 9. [54] Package natbib Warning: Citation `flex' on page 55 undefined on input line 95. Underfull \hbox (badness 4752) in paragraph at lines 95--99 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Lexer is writ-ten us-ing the lexer gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 flex \T1/LinuxLibertineT-TLF/b/n/1 0 ?\T1/LinuxLibertineT-TLF/m/n/10 . Its source code can be found in Package natbib Warning: Citation `bison' on page 55 undefined on input line 117 . Overfull \hbox (134.40291pt too wide) in paragraph at lines 117--119 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Parser is writ-ten us-ing the parse r gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 bi-son \T1/LinuxLibertineT-TLF/b /n/10 ?\T1/LinuxLibertineT-TLF/m/n/10 . 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[60] Overfull \hbox (4.04175pt too wide) in paragraph at lines 656--659 []\T1/LinuxLibertineT-TLF/m/n/10 During this re-cur-sive eval-u-a-tion, three d if-fer-ent rel-e-vant types of AST nodes can be dis-cov-ered: \T1/LinuxLibertin eMonoT-TLF/regular/n/10 AST_ASSIGN_LE Underfull \hbox (badness 10000) in paragraph at lines 702--705 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 705--710 []\T1/LinuxLibertineT-TLF/m/n/10 A new [][][][][] ob-ject is gen-er-ated, the s e-lec-tion ex-pres-sion is eval-u-ated Underfull \hbox (badness 10000) in paragraph at lines 705--710 \T1/LinuxLibertineT-TLF/m/n/10 us-ing [][][][][][][][] (with the use of [][][] and Underfull \hbox (badness 1231) in paragraph at lines 705--710 [][][]\T1/LinuxLibertineT-TLF/m/n/10 ) and added to the [][][][][] ob-ject and the ob-ject is added Underfull \hbox (badness 1226) in paragraph at lines 713--716 []\T1/LinuxLibertineT-TLF/m/n/10 New tem-po-rary sig-nals are gen-er-ated for a ll sig-nals in [][][] and stored in Underfull \hbox (badness 10000) in paragraph at lines 716--719 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals in [][][] are mapped us-ing [][][ ] and [61] Underfull \hbox (badness 10000) in paragraph at lines 724--728 []\T1/LinuxLibertineT-TLF/m/n/10 Set [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 731--734 []\T1/LinuxLibertineT-TLF/m/n/10 Append [][][] to [][][] and ap-pend Underfull \hbox (badness 3514) in paragraph at lines 739--742 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to t he new Underfull \hbox (badness 10000) in paragraph at lines 754--757 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 757--760 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals from [][][] are re-moved from the Underfull \hbox (badness 10000) in paragraph at lines 769--771 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to [62] Overfull \hbox (0.63689pt too wide) in paragraph at lines 789--796 \T1/LinuxLibertineT-TLF/m/n/10 calls to [][][][][][][][] with a [][][]/[][][]-t uple that Overfull \hbox (32.64174pt too wide) in paragraph at lines 799--802 \T1/LinuxLibertineT-TLF/m/n/10 The Pro-cess-Gen-er-a-tor con-verts a be-haviour al model in AST rep-re-sen-ta-tion to a be-havioural model in [][][][][] [63]) [64] (./CHAPTER_Optimize.tex Chapter 8. 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LaTeX Warning: Reference `enum:fsm_extract_cealg_try' on page 69 undefined on i nput line 281. [69] Package natbib Warning: Citation `Formality' on page 70 undefined on input line 315. Package natbib Warning: Citation `ABC' on page 70 undefined on input line 320. LaTeX Warning: Reference `sec:techmap_extern' on page 70 undefined on input lin e 323. ) [70] (./CHAPTER_Techmap.tex Chapter 9. LaTeX Warning: Reference `sec:celllib_gates' on page 71 undefined on input line 12. LaTeX Warning: Reference `cmd:techmap' on page 71 undefined on input line 34. [71] Package natbib Warning: Citation `intersynthFdlBookChapter' on page 72 undefine d on input line 61. LaTeX Warning: Reference `sec:SubCircuit' on page 72 undefined on input line 66 . Package natbib Warning: Citation `LibertyFormat' on page 72 undefined on input line 74. Package natbib Warning: Citation `ABC' on page 72 undefined on input line 92. LaTeX Warning: Reference `sec:filterlib' on page 72 undefined on input line 100 . ) [72] (./CHAPTER_Auxlibs.tex Appendix A. Package natbib Warning: Citation `bigint' on page 73 undefined on input line 16 . Package natbib Warning: Citation `UllmannSubgraphIsomorphism' on page 73 undefi ned on input line 26. LaTeX Warning: Reference `cmd:extract' on page 73 undefined on input line 27. LaTeX Warning: Reference `cmd:sat' on page 73 undefined on input line 34. ) [73] (./CHAPTER_Auxprogs.tex Appendix B. LaTeX Warning: Reference `chapter:prog' on page 74 undefined on input line 11. LaTeX Warning: Reference `sec:techmap_extern' on page 74 undefined on input lin e 17. Package natbib Warning: Citation `ABC' on page 74 undefined on input line 22. ) [74] Appendix C. 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Overfull \hbox (7.07013pt too wide) in paragraph at lines 620--622 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [86] Overfull \hbox (13.07019pt too wide) in paragraph at lines 679--680 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [87] Overfull \hbox (19.07025pt too wide) in paragraph at lines 680--681 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 681--682 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 682--683 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 683--684 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 698--699 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 704--705 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 705--707 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 708--709 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 716--717 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 727--728 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [88] [89] Overfull \hbox (13.07019pt too wide) in paragraph at lines 786--787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 793--794 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 802--803 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 829--830 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [90] Overfull \hbox (13.07019pt too wide) in paragraph at lines 867--868 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 870--871 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 880--881 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 889--891 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [91] Overfull \hbox (13.07019pt too wide) in paragraph at lines 893--894 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 934--935 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [92] Overfull \hbox (7.07013pt too wide) in paragraph at lines 962--963 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 963--964 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 964--965 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 970--971 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 979--980 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 980--981 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 981--982 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 982--983 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 983--984 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 984--985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 985--986 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 986--987 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [93] Overfull \hbox (7.07013pt too wide) in paragraph at lines 997--998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (4.31282pt too wide) in paragraph at lines 1011--1011 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_fixup -- in-sert nec-es-sary buf fer cells for CoolRunner- Overfull \hbox (7.92607pt too wide) in paragraph at lines 1019--1019 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_sop -- break $sop cells into AND TER-M/ORTERM cells Overfull \hbox (13.07019pt too wide) in paragraph at lines 1041--1042 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [94] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1046--1048 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1061--1062 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [95] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1141--1144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [96] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1161--1162 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1167--1168 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [97] [98] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1271--1272 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1282--1283 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 1284--1285 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][] Overfull \hbox (253.07263pt too wide) in paragraph at lines 1307--1308 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [99] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1316--1317 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 1317--1318 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [100] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1380--1381 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [101] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1453--1454 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1463--1464 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [102] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1474--1476 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1499--1500 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [103] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1553--1554 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1554--1555 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1563--1564 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [104] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1614--1615 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1615--1616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [105] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1656--1657 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1666--1667 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 1667--1668 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [106] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1703--1704 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1707--1708 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1711--1712 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1722--1723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [107] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1742--1743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1784--1786 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [108] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1797--1798 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1808--1809 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1820--1821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [109] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1868--1869 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1869--1870 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1870--1871 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1871--1872 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1872--1873 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1873--1875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1876--1877 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1877--1878 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1887--1888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1889--1890 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [110] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1906--1907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1923--1924 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1924--1925 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1928--1929 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1932--1934 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1946--1947 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [111] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1962--1963 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1966--1967 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1997--1998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [112] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2018--2019 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2020--2022 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [113] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2104--2105 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2117--2118 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2118--2119 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [114] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2139--2140 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [115] [116] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2270--2271 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2278--2279 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [117] Overfull \hbox (14.32883pt too wide) in paragraph at lines 2328--2328 []\T1/LinuxLibertineT-TLF/b/n/14.4 ice40_braminit -- iCE40: per-form SB_RAM40_4 K ini-tial-iza-tion from [118] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2342--2343 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2344--2346 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2347--2348 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2350--2351 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2352--2353 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2376--2377 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2377--2378 [][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2385--2386 [][][][][][][][][][][][][][][][][][][][][] [119] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2428--2429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [120] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2477--2478 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2482--2483 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2483--2485 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [121] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2501--2502 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2528--2529 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2532--2534 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2535--2536 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2547--2548 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [122] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2555--2556 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2575--2576 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 2582--2584 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2589--2590 [][][][][][][][][][][][][][][][][][][][][][][][][][] [123] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2608--2609 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2609--2610 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2612--2613 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paragraph at lines 2788--2790 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2791--2792 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2800--2801 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2809--2810 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2812--2813 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [127] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2820--2821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2830--2833 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2844--2845 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paragraph at lines 3103--3104 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] [133] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3154--3155 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.21193pt too wide) in paragraph at lines 3160--3160 []\T1/LinuxLibertineT-TLF/b/n/14.4 opt_mem_priority -- re-move pri-or-ity re-la -tions be-tween write ports Overfull \hbox (1.07007pt too wide) in paragraph at lines 3165--3166 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3168--3169 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [134] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3201--3202 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [135] [136] [137] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3348--3349 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3349--3350 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3363--3364 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3367--3368 [][][][][][][][][][][][][][][][][][][][][][][][] [138] [139] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3466--3467 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3468--3469 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3469--3470 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [140] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3548--3549 [][][][][][][][][][][][][][][][][][][][][][][][][][] [141] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3556--3557 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too wide) in paragraph at lines 3578--3580 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 3581--3582 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 3582--3583 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 3583--3584 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 3584--3585 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3599--3601 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [142] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3611--3612 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 3615--3616 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at lines 3999--4000 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4005--4006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4028--4029 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [150] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4053--4055 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4069--4071 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [151] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4100--4102 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4125--4126 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4126--4127 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[][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [161] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4636--4638 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4655--4656 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4664--4665 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4668--4669 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4680--4681 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4685--4686 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4686--4687 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [162] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4690--4691 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4691--4692 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4725--4726 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4728--4729 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [163] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4741--4742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4742--4743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4743--4744 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4762--4764 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4765--4767 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4774--4775 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4775--4776 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4776--4777 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4786--4787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [164] Overfull \hbox (295.07306pt too wide) in paragraph at lines 4848--4849 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][] [165] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4856--4857 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\hbox (1.07007pt too wide) in paragraph at lines 5092--5093 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [170] Overfull \hbox (37.07043pt too wide) in paragraph at lines 5150--5151 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5164--5165 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5168--5169 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [171] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5217--5218 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [172] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5252--5253 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5260--5261 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [173] Overfull \hbox (319.0733pt too wide) in paragraph at lines 5317--5318 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lines 5510--5511 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (805.07825pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5521--5522 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][] [178] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5570--5571 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5574--5575 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [179] Overfull \hbox (169.07178pt too wide) in paragraph at lines 5621--5622 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] [180] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5668--5669 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5707--5708 [][][][][][][][][][][][][][][][][][][][][][][][][][] [181] Overfull \hbox (349.07361pt too wide) in paragraph at lines 5741--5742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (235.07245pt too wide) in paragraph at lines 5754--5755 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] [182] Overfull \hbox (1.07007pt too wide) in paragraph at lines 5807--5808 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [183] [184] Overfull \hbox (205.07214pt too wide) in paragraph at lines 5881--5883 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][] Overfull \hbox (361.07373pt too wide) in paragraph at lines 5885--5886 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (115.07123pt too wide) in paragraph at lines 5910--5911 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [185] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5931--5932 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [186] Overfull \hbox (457.0747pt too wide) in paragraph at lines 5984--5985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6009--6010 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6016--6017 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6020--6021 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6024--6025 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [187] [188] Overfull \hbox (655.07672pt too wide) in paragraph at lines 6102--6103 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6122--6123 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (547.07562pt too wide) in paragraph at lines 6133--6134 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][] [189] Overfull \hbox (91.07098pt too wide) in paragraph at lines 6185--6186 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6186--6188 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6192--6193 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6194--6195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [190] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6198--6199 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6239--6240 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6240--6242 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [191] Overfull \hbox (19.07025pt too wide) in paragraph at lines 6261--6262 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (91.07098pt too wide) in paragraph at lines 6272--6274 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6298--6299 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 6299--6301 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6302--6304 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [192] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6308--6310 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 6338--6339 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [193] Overfull \hbox (397.0741pt too wide) in paragraph at lines 6363--6364 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][] Overfull \hbox (73.0708pt too wide) in paragraph at lines 6364--6365 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (109.07117pt too wide) in paragraph at lines 6374--6376 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [194] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6424--6425 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6428--6429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6432--6433 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [195] Overfull \hbox (487.07501pt too wide) in paragraph at lines 6473--6474 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][] Overfull \hbox (265.07275pt too wide) in paragraph at lines 6474--6475 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][] [196] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6520--6521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6524--6525 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [197] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6618--6619 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (163.07172pt too wide) in paragraph at lines 6623--6624 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] [198] Overfull \hbox (529.07544pt too wide) in paragraph at lines 6629--6630 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 6630--6631 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [199] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6678--6679 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6682--6683 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 6686--6687 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (67.07074pt too wide) in paragraph at lines 6692--6693 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6722--6723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] [200] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6733--6734 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6756--6758 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6782--6783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [201] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6786--6787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6790--6791 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6835--6836 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [202] Overfull \hbox (175.07184pt too wide) in paragraph at lines 6849--6850 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][] Overfull \hbox (247.07257pt too wide) in paragraph at lines 6850--6851 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6874--6875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6875--6876 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [203] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6902--6903 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6906--6907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6925--6927 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6941--6942 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6942--6943 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [204] [205] Overfull \hbox (151.0716pt too wide) in paragraph at lines 7029--7030 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 7033--7034 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 7038--7039 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 7044--7045 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 7048--7049 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [206] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7083--7084 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [207] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7126--7127 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7130--7131 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7134--7135 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7135--7136 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7136--7137 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7137--7138 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 7140--7141 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7141--7143 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7143--7144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7150--7151 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7151--7152 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7157--7158 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [208] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7169--7170 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7170--7171 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7171--7172 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paragraph at lines 7194--7195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7195--7196 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 7196--7197 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7197--7198 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7200--7201 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7204--7205 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [209] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7213--7214 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 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paragraph at lines 7820--7821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [221] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7884--7885 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7885--7887 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7887--7888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7904--7905 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7905--7906 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7906--7908 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 7908--7909 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wide) in paragraph at lines 7963--7964 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7964--7965 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [223] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7976--7977 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 7986--7987 [][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7989--7990 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7991--7993 [][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8008--8009 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 8009--8010 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 8014--8015 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8019--8020 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [224] Overfull \hbox (19.07025pt too wide) in paragraph at lines 8024--8025 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 8028--8029 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8029--8030 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 8030--8031 [][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8031--8032 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8041--8042 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][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8339--8340 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [230] [231] Overfull \hbox (13.07019pt too wide) in paragraph at lines 8432--8434 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 8434--8435 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [232] Overfull \hbox (19.07025pt too wide) in paragraph at lines 8471--8472 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8472--8473 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 8489--8490 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [233] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8513--8514 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Package natbib Warning: Citation `OR1200' on page 31 undefined on input line 13 . Package natbib Warning: Citation `openMSP430' on page 31 undefined on input lin e 13. Package natbib Warning: Citation `i2cmaster' on page 31 undefined on input line 14. Package natbib Warning: Citation `k68' on page 31 undefined on input line 14. [31] [32] [33] Overfull \hbox (8.12611pt too wide) in paragraph at lines 204--209 \T1/LinuxLibertineT-TLF/m/n/10 The RTLIL::Design ob-ject is ba-si-cally just a con-tainer for RTLIL::Module ob-jects. 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Overfull \hbox (18.66872pt too wide) in paragraph at lines 68--72 []\T1/LinuxLibertineT-TLF/m/n/10 For the unary cells that out-put a log-i-cal v alue (\T1/LinuxLibertineMonoT-TLF/regular/n/10 $reduce_and\T1/LinuxLibertineT-T LF/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $reduce_or\T1/LinuxLiberti neT-TLF/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $reduce_xor\T1/LinuxL ibertineT-TLF/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $reduce_xnor\T1 /LinuxLibertineT-TLF/m/n/10 , Overfull \hbox (5.92467pt too wide) in paragraph at lines 68--72 \T1/LinuxLibertineMonoT-TLF/regular/n/10 $reduce_bool\T1/LinuxLibertineT-TLF/m/ n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $logic_not\T1/LinuxLibertineT-T LF/m/n/10 ), when the \T1/LinuxLibertineMonoT-TLF/regular/n/10 \Y_WIDTH \T1/Lin uxLibertineT-TLF/m/n/10 pa-ram-e-ter is greater than 1, the out-put is zero-ext ended, [40] LaTeX Warning: `h' float specifier changed to `ht'. [41] [42] [43] Overfull \hbox (11.39877pt too wide) in paragraph at lines 306--311 []\T1/LinuxLibertineT-TLF/m/n/10 D-type flip-flops with en-able are rep-re-sent ed by \T1/LinuxLibertineMonoT-TLF/regular/n/10 $dffe\T1/LinuxLibertineT-TLF/m/n /10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $adffe\T1/LinuxLibertineT-TLF/m/ n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $aldffe\T1/LinuxLibertineT-TLF/ m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $dffsre\T1/LinuxLibertineT-TL F/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $sdffe\T1/LinuxLibertineT-T LF/m/n/10 , and \T1/LinuxLibertineMonoT-TLF/regular/n/10 $sdffce Overfull \hbox (4.45451pt too wide) in paragraph at lines 352--354 \T1/LinuxLibertineT-TLF/m/n/10 Memories are ei-ther rep-re-sented us-ing RTLIL: :Memory ob-jects, \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memrd_v2\T1/LinuxLi bertineT-TLF/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memwr_v2\T1/Lin uxLibertineT-TLF/m/n/10 , and \T1/LinuxLibertineMonoT-TLF/regular/n/10 $meminit _v2 [44] [45] Overfull \hbox (17.60497pt too wide) in paragraph at lines 473--479 []\T1/LinuxLibertineT-TLF/m/n/10 The HDL fron-tend mod-els a mem-ory us-ing RTL IL::Memory ob-jects and asyn-chronous \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memrd_v2 \T1/LinuxLibertineT-TLF/m/n/10 and \T1/LinuxLibertineMonoT-TLF/regula r/n/10 $memwr_v2 [46] Overfull \hbox (39.64764pt too wide) in paragraph at lines 513--516 \T1/LinuxLibertineT-TLF/m/n/10 This pa-ram-e-ter is \T1/LinuxLibertineMonoT-TLF /regular/n/10 \RD_PORTS*WR_PORTS \T1/LinuxLibertineT-TLF/m/n/10 bits wide, con- tain-ing a con-cate-na-tion of all \T1/LinuxLibertineMonoT-TLF/regular/n/10 \TR ANSPARENCY_MASK Overfull \hbox (33.24765pt too wide) in paragraph at lines 517--520 \T1/LinuxLibertineT-TLF/m/n/10 This pa-ram-e-ter is \T1/LinuxLibertineMonoT-TLF /regular/n/10 \RD_PORTS*WR_PORTS \T1/LinuxLibertineT-TLF/m/n/10 bits wide, con- tain-ing a con-cate-na-tion of all \T1/LinuxLibertineMonoT-TLF/regular/n/10 \CO LLISION_X_MASK [47] Overfull \hbox (14.04767pt too wide) in paragraph at lines 545--548 \T1/LinuxLibertineT-TLF/m/n/10 This pa-ram-e-ter is \T1/LinuxLibertineMonoT-TLF /regular/n/10 \WR_PORTS*WR_PORTS \T1/LinuxLibertineT-TLF/m/n/10 bits wide, con- tain-ing a con-cate-na-tion of all \T1/LinuxLibertineMonoT-TLF/regular/n/10 \PR IORITY_MASK Overfull \hbox (0.88203pt too wide) in paragraph at lines 584--589 []\T1/LinuxLibertineT-TLF/m/n/10 The \T1/LinuxLibertineMonoT-TLF/regular/n/10 m emory_collect \T1/LinuxLibertineT-TLF/m/n/10 pass can be used to con-vert dis-c rete \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memrd_v2\T1/LinuxLibertineT-TLF/ m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memwr_v2\T1/LinuxLibertineT- TLF/m/n/10 , and \T1/LinuxLibertineMonoT-TLF/regular/n/10 $meminit_v2 [48] Underfull \hbox (badness 1701) in paragraph at lines 605--607 []\T1/LinuxLibertineT-TLF/m/n/10 Add in-for-ma-tion about \T1/LinuxLibertineMon oT-TLF/regular/n/10 $assert\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertineM onoT-TLF/regular/n/10 $assume\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertin eMonoT-TLF/regular/n/10 $live\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertin eMonoT-TLF/regular/n/10 $fair\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertin eMonoT-TLF/regular/n/10 $cover\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLiberti neMonoT-TLF/regular/n/10 $equiv\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibert ineMonoT-TLF/regular/n/10 $initstate\T1/LinuxLibertineT-TLF/m/n/10 , [49] [50] [51] [52] [53] Package natbib Warning: Citation `ABC' on page 54 undefined on input line 994. ) [54] (./CHAPTER_Prog.tex Chapter 6. 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[64] Package natbib Warning: Citation `flex' on page 65 undefined on input line 95. Underfull \hbox (badness 2103) in paragraph at lines 95--99 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Lexer is writ-ten us-ing the lexer gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 flex \T1/LinuxLibertineT-TLF/m/n/1 0 [\T1/LinuxLibertineT-TLF/b/n/10 ? \T1/LinuxLibertineT-TLF/m/n/10 ]. Its sourc e code can be found in Package natbib Warning: Citation `bison' on page 65 undefined on input line 117 . Overfull \hbox (144.16223pt too wide) in paragraph at lines 117--119 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Parser is writ-ten us-ing the parse r gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 bi-son \T1/LinuxLibertineT-TLF/m /n/10 [\T1/LinuxLibertineT-TLF/b/n/10 ? \T1/LinuxLibertineT-TLF/m/n/10 ]. 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Af-ter ini-tial-iza-tion of Overfull \hbox (16.68127pt too wide) in paragraph at lines 641--644 \T1/LinuxLibertineT-TLF/m/n/10 A pointer to a [][][][][] ob-ject. Ini-tially th is is the root case of the gen-er-ated [][][][][]. [70] Overfull \hbox (4.04175pt too wide) in paragraph at lines 656--659 []\T1/LinuxLibertineT-TLF/m/n/10 During this re-cur-sive eval-u-a-tion, three d if-fer-ent rel-e-vant types of AST nodes can be dis-cov-ered: \T1/LinuxLibertin eMonoT-TLF/regular/n/10 AST_ASSIGN_LE Underfull \hbox (badness 10000) in paragraph at lines 702--705 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 705--710 []\T1/LinuxLibertineT-TLF/m/n/10 A new [][][][][] ob-ject is gen-er-ated, the s e-lec-tion ex-pres-sion is eval-u-ated Underfull \hbox (badness 10000) in paragraph at lines 705--710 \T1/LinuxLibertineT-TLF/m/n/10 us-ing [][][][][][][][] (with the use of [][][] and Underfull \hbox (badness 1231) in paragraph at lines 705--710 [][][]\T1/LinuxLibertineT-TLF/m/n/10 ) and added to the [][][][][] ob-ject and the ob-ject is added Underfull \hbox (badness 1226) in paragraph at lines 713--716 []\T1/LinuxLibertineT-TLF/m/n/10 New tem-po-rary sig-nals are gen-er-ated for a ll sig-nals in [][][] and stored in Underfull \hbox (badness 10000) in paragraph at lines 716--719 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals in [][][] are mapped us-ing [][][ ] and [71] Underfull \hbox (badness 10000) in paragraph at lines 724--728 []\T1/LinuxLibertineT-TLF/m/n/10 Set [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 731--734 []\T1/LinuxLibertineT-TLF/m/n/10 Append [][][] to [][][] and ap-pend Underfull \hbox (badness 3514) in paragraph at lines 739--742 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to t he new Underfull \hbox (badness 10000) in paragraph at lines 754--757 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 757--760 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals from [][][] are re-moved from the Underfull \hbox (badness 10000) in paragraph at lines 769--771 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to [72] Overfull \hbox (0.63689pt too wide) in paragraph at lines 789--796 \T1/LinuxLibertineT-TLF/m/n/10 calls to [][][][][][][][] with a [][][]/[][][]-t uple that Overfull \hbox (32.64174pt too wide) in paragraph at lines 799--802 \T1/LinuxLibertineT-TLF/m/n/10 The Pro-cess-Gen-er-a-tor con-verts a be-haviour al model in AST rep-re-sen-ta-tion to a be-havioural model in [][][][][] [73]) [74] (./CHAPTER_Optimize.tex Chapter 8. Package natbib Warning: Citation `Verilog2005' on page 75 undefined on input li ne 69. [75] [76] Overfull \hbox (1.26599pt too wide) in paragraph at lines 129--132 \T1/LinuxLibertineT-TLF/m/n/10 This pass iden-ti-fies un-used sig-nals and cell s and re-moves them from the de-sign. It also cre-ates an \T1/LinuxLibertineMon oT-TLF/regular/n/10 \unused_bits Overfull \hbox (43.95105pt too wide) in paragraph at lines 190--196 \T1/LinuxLibertineT-TLF/m/n/10 at-tribute. The \T1/LinuxLibertineMonoT-TLF/regu lar/n/10 fsm_extract \T1/LinuxLibertineT-TLF/m/n/10 ex-tracts all FSMs marked u s-ing the \T1/LinuxLibertineMonoT-TLF/regular/n/10 \fsm_encoding \T1/LinuxLiber tineT-TLF/m/n/10 at-tribute (un-less \T1/LinuxLibertineMonoT-TLF/regular/n/10 \ fsm_encoding [77] Package natbib Warning: Citation `fsmextract' on page 78 undefined on input lin e 202. Overfull \hbox (1.6189pt too wide) in paragraph at lines 220--224 []\T1/LinuxLibertineT-TLF/m/n/10 This heuris-tic has proven to work very well. It is pos-si-ble to over-write it by set-ting \T1/LinuxLibertineMonoT-TLF/regul ar/n/10 \fsm_encoding= "auto" [78] [79] Package natbib Warning: Citation `Formality' on page 80 undefined on input line 315. Package natbib Warning: Citation `ABC' on page 80 undefined on input line 320. ) [80] (./CHAPTER_Techmap.tex Chapter 9. [81] Package natbib Warning: Citation `intersynthFdlBookChapter' on page 82 undefine d on input line 61. Package natbib Warning: Citation `LibertyFormat' on page 82 undefined on input line 74. Package natbib Warning: Citation `ABC' on page 82 undefined on input line 92. ) [82] (./CHAPTER_Auxlibs.tex Appendix A. Package natbib Warning: Citation `bigint' on page 83 undefined on input line 16 . Package natbib Warning: Citation `UllmannSubgraphIsomorphism' on page 83 undefi ned on input line 26. ) [83] (./CHAPTER_Auxprogs.tex Appendix B. Package natbib Warning: Citation `ABC' on page 84 undefined on input line 22. ) [84] Appendix C. (./command-reference-manual.tex Overfull \hbox (13.07019pt too wide) in paragraph at lines 8--9 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (61.07068pt too wide) in paragraph at lines 12--13 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 13--15 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [85] Overfull \hbox (7.07013pt too wide) in paragraph at lines 73--74 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [86] Overfull \hbox (1.07007pt too wide) in paragraph at lines 111--112 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 116--117 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 128--129 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 139--140 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 145--146 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 146--147 [][][][][][][][][][][][][][][][][][][][][][][][] [87] Overfull \hbox (7.07013pt too wide) in paragraph at lines 154--155 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 162--163 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 166--167 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 167--168 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 172--173 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wide) in paragraph at lines 344--345 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 345--347 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [91] Overfull \hbox (1.07007pt too wide) in paragraph at lines 373--374 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 381--382 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 385--386 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 392--393 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 393--394 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 397--398 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[][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 963--964 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 964--965 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 970--971 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 979--980 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 980--981 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 981--982 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 982--983 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 983--984 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 984--985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 985--986 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 986--987 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [103] Overfull \hbox (7.07013pt too wide) in paragraph at lines 997--998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (4.31282pt too wide) in paragraph at lines 1011--1011 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_fixup -- in-sert nec-es-sary buf fer cells for CoolRunner- Overfull \hbox (7.92607pt too wide) in paragraph at lines 1019--1019 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_sop -- break $sop cells into AND TER-M/ORTERM cells Overfull \hbox (13.07019pt too wide) in paragraph at lines 1041--1042 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [104] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1046--1048 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1061--1062 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [105] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1141--1144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [106] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1161--1162 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1167--1168 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [107] [108] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1271--1272 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1282--1283 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 1284--1285 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][] Overfull \hbox (253.07263pt too wide) in paragraph at lines 1307--1308 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [109] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1316--1317 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 1317--1318 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [110] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1380--1381 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [111] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1453--1454 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1463--1464 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [112] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1474--1476 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1499--1500 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [113] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1553--1554 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1554--1555 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1563--1564 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [114] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1614--1615 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1615--1616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [115] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1656--1657 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1666--1667 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 1667--1668 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [116] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1703--1704 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1707--1708 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1711--1712 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1722--1723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [117] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1742--1743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1784--1786 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [118] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1797--1798 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1808--1809 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1820--1821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [119] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1868--1869 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1869--1870 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1870--1871 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1871--1872 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1872--1873 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1873--1875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1876--1877 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1877--1878 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1887--1888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1889--1890 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [120] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1906--1907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1923--1924 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1924--1925 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1928--1929 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1932--1934 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1946--1947 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [121] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1962--1963 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1966--1967 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1997--1998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [122] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2018--2019 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2020--2022 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [123] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2104--2105 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2117--2118 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2118--2119 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [124] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2139--2140 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [125] [126] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2270--2271 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2278--2279 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [127] Overfull \hbox (14.32883pt too wide) in paragraph at lines 2328--2328 []\T1/LinuxLibertineT-TLF/b/n/14.4 ice40_braminit -- iCE40: per-form SB_RAM40_4 K ini-tial-iza-tion from [128] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2342--2343 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2344--2346 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2347--2348 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2350--2351 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2352--2353 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2376--2377 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2377--2378 [][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2385--2386 [][][][][][][][][][][][][][][][][][][][][] [129] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2428--2429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [130] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2477--2478 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2482--2483 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2483--2485 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [131] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2501--2502 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2528--2529 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2532--2534 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2535--2536 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2547--2548 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [132] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2555--2556 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2575--2576 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 2582--2584 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2589--2590 [][][][][][][][][][][][][][][][][][][][][][][][][][] [133] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2608--2609 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2609--2610 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2612--2613 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2615--2616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2633--2634 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2641--2642 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2642--2643 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2645--2646 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2646--2648 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2648--2649 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [134] [135] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2718--2719 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2735--2736 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2736--2737 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2737--2738 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [136] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2780--2782 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2782--2783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2787--2788 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2788--2790 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2791--2792 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2800--2801 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2809--2810 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2812--2813 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [137] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2820--2821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2830--2833 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2844--2845 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2858--2860 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2867--2868 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [138] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2919--2920 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [139] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2925--2926 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2947--2948 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2952--2953 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [140] Overfull \hbox (61.07068pt too wide) in paragraph at lines 2995--2996 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3003--3004 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 3005--3006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 3011--3012 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3013--3014 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3028--3029 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [141] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3051--3052 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3052--3053 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paragraph at lines 3103--3104 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] [143] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3154--3155 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.21193pt too wide) in paragraph at lines 3160--3160 []\T1/LinuxLibertineT-TLF/b/n/14.4 opt_mem_priority -- re-move pri-or-ity re-la -tions be-tween write ports Overfull \hbox (1.07007pt too wide) in paragraph at lines 3165--3166 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3168--3169 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [144] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3201--3202 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [145] [146] [147] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3348--3349 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3349--3350 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3363--3364 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3367--3368 [][][][][][][][][][][][][][][][][][][][][][][][] [148] [149] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3466--3467 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3468--3469 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3469--3470 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [150] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3548--3549 [][][][][][][][][][][][][][][][][][][][][][][][][][] [151] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3556--3557 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at lines 3999--4000 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4005--4006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4028--4029 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [160] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4053--4055 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4069--4071 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [161] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4100--4102 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4125--4126 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4126--4127 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Overfull \hbox (1.07007pt too wide) in paragraph at lines 4690--4691 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4691--4692 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4725--4726 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4728--4729 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [173] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4741--4742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4742--4743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4743--4744 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 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\hbox (1.07007pt too wide) in paragraph at lines 5092--5093 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [180] Overfull \hbox (37.07043pt too wide) in paragraph at lines 5150--5151 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5164--5165 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5168--5169 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [181] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5217--5218 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [182] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5252--5253 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5260--5261 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [183] Overfull \hbox (319.0733pt too wide) in paragraph at lines 5317--5318 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lines 5510--5511 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (805.07825pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5521--5522 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][] [188] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5570--5571 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5574--5575 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [189] Overfull \hbox (169.07178pt too wide) in paragraph at lines 5621--5622 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] [190] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5668--5669 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5707--5708 [][][][][][][][][][][][][][][][][][][][][][][][][][] [191] Overfull \hbox (349.07361pt too wide) in paragraph at lines 5741--5742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (235.07245pt too wide) in paragraph at lines 5754--5755 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] [192] Overfull \hbox (1.07007pt too wide) in paragraph at lines 5807--5808 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [193] [194] Overfull \hbox (205.07214pt too wide) in paragraph at lines 5881--5883 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][] Overfull \hbox (361.07373pt too wide) in paragraph at lines 5885--5886 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (115.07123pt too wide) in paragraph at lines 5910--5911 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [195] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5931--5932 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [196] Overfull \hbox (457.0747pt too wide) in paragraph at lines 5984--5985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6009--6010 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6016--6017 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6020--6021 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6024--6025 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [197] [198] Overfull \hbox (655.07672pt too wide) in paragraph at lines 6102--6103 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6122--6123 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (547.07562pt too wide) in paragraph at lines 6133--6134 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][] [199] Overfull \hbox (91.07098pt too wide) in paragraph at lines 6185--6186 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6186--6188 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6192--6193 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6194--6195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [200] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6198--6199 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6239--6240 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6240--6242 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [201] Overfull \hbox (19.07025pt too wide) in paragraph at lines 6261--6262 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(265.07275pt too wide) in paragraph at lines 6474--6475 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][] [206] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6520--6521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6524--6525 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [207] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6618--6619 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (163.07172pt too wide) in paragraph at lines 6623--6624 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] [208] Overfull \hbox (529.07544pt too wide) in paragraph at lines 6629--6630 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 6630--6631 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [209] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6678--6679 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6682--6683 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 6686--6687 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (67.07074pt too wide) in paragraph at lines 6692--6693 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6722--6723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] [210] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6733--6734 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6756--6758 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6782--6783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [211] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6786--6787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6790--6791 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6835--6836 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [212] Overfull \hbox (175.07184pt too wide) in paragraph at lines 6849--6850 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][] Overfull \hbox (247.07257pt too wide) in paragraph at lines 6850--6851 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6874--6875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6875--6876 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [213] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6902--6903 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6906--6907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6925--6927 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6941--6942 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6942--6943 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [214] [215] Overfull \hbox (151.0716pt too wide) in paragraph at lines 7029--7030 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 7033--7034 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 7038--7039 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 7044--7045 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 7048--7049 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [216] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7083--7084 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [217] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7126--7127 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7130--7131 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7134--7135 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7135--7136 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7136--7137 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7137--7138 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 7140--7141 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7141--7143 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7143--7144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7150--7151 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7151--7152 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7157--7158 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [218] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7169--7170 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7170--7171 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7171--7172 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paragraph at lines 7194--7195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7195--7196 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 7196--7197 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7197--7198 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7200--7201 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7204--7205 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [219] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7213--7214 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 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8848--8849 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8849--8850 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8858--8859 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8861--8862 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8862--8863 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8875--8876 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 8877--8878 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8879--8880 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [250] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8887--8888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) [251] (./CHAPTER_TextRtlil.tex Appendix D. [252] [253] [254] [255] [256]) [257] (./CHAPTER_Appnotes.tex Appendix E. [258] [259 <./APPNOTE_010_Verilog_to_BLIF.pdf>] [260 <./APPNOTE_010_Verilog_to_ BLIF.pdf>] [261 <./APPNOTE_010_Verilog_to_BLIF.pdf>] [262 <./APPNOTE_011_Design _Investigation.pdf>] [263 <./APPNOTE_011_Design_Investigation.pdf>] [264 <./APP NOTE_011_Design_Investigation.pdf>] [265 <./APPNOTE_011_Design_Investigation.pd f>] [266 <./APPNOTE_011_Design_Investigation.pdf>] [267 <./APPNOTE_011_Design_I nvestigation.pdf>] [268 <./APPNOTE_011_Design_Investigation.pdf>] [269 <./APPNO TE_011_Design_Investigation.pdf>] [270 <./APPNOTE_011_Design_Investigation.pdf> ] [271 <./APPNOTE_011_Design_Investigation.pdf>] [272 <./APPNOTE_012_Verilog_to _BTOR.pdf>] [273 <./APPNOTE_012_Verilog_to_BTOR.pdf>] [274 <./APPNOTE_012_Veril og_to_BTOR.pdf>] [275 <./APPNOTE_012_Verilog_to_BTOR.pdf>]) (./manual.bbl [276]) (./weblink.bbl [277] Underfull \hbox (badness 10000) in paragraph at lines 39--39 []\T1/LinuxLibertineT-TLF/m/n/10 Synopsys For-mal-ity Equiv-a-lence Check-ing. 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(/usr/share/texlive/texmf-dist/tex/latex/lm/omxlmex.fd) [3] (./manual.toc [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]) [14] (./CHAPTER_Intro.tex Chapter 1. LaTeX Warning: Reference `chapter:sota' on page 15 undefined on input line 52. [15] LaTeX Warning: Reference `chapter:eval' on page 16 undefined on input line 89. LaTeX Warning: Reference `chapter:sota' on page 16 undefined on input line 96. ) [16] (./CHAPTER_Basics.tex Chapter 2. [17] (/usr/share/texlive/texmf-dist/tex/latex/libertine/T1LinuxLibertineMonoT-TLF.fd ) (/usr/share/texlive/texmf-dist/tex/latex/listings/lstlang1.sty) (/usr/share/texlive/texmf-dist/tex/latex/listings/lstlang2.sty) (/usr/share/texlive/texmf-dist/tex/latex/listings/lstlang3.sty) LaTeX Warning: Reference `chapter:sota' on page 18 undefined on input line 139. [18] Overfull \hbox (12.97556pt too wide) in paragraph at lines 198--204 []\T1/LinuxLibertineT-TLF/m/n/10 Therefore mod-ern logic syn-the-sis tools uti- lize much more com-pli-cated \T1/LinuxLibertineT-TLF/m/it/10 multi-level logic syn-the-sis \T1/LinuxLibertineT-TLF/m/n/10 al-go-rithms [[]]. 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[31] [32] [33] Overfull \hbox (8.12611pt too wide) in paragraph at lines 204--209 \T1/LinuxLibertineT-TLF/m/n/10 The RTLIL::Design ob-ject is ba-si-cally just a con-tainer for RTLIL::Module ob-jects. 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[64] Underfull \hbox (badness 3009) in paragraph at lines 95--99 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Lexer is writ-ten us-ing the lexer gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 flex \T1/LinuxLibertineT-TLF/m/n/1 0 [[]]. Its source code can be found in Overfull \hbox (146.52289pt too wide) in paragraph at lines 117--119 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Parser is writ-ten us-ing the parse r gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 bi-son \T1/LinuxLibertineT-TLF/m /n/10 [[]]. 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This ob-ject then gen-e r-ates the [][][][][] [68] [69] Overfull \hbox (30.01938pt too wide) in paragraph at lines 597--601 []\T1/LinuxLibertineT-TLF/m/n/10 Note that in con-trast to this, the or-der wit hin the [][][][][] ob-jects within a [][][][][] Underfull \hbox (badness 1360) in paragraph at lines 602--607 []\T1/LinuxLibertineT-TLF/m/n/10 The whole [][][][][]/[][][][][] tree de-scribe s an asyn-chronous cir-cuit. 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[70] Overfull \hbox (4.04175pt too wide) in paragraph at lines 656--659 []\T1/LinuxLibertineT-TLF/m/n/10 During this re-cur-sive eval-u-a-tion, three d if-fer-ent rel-e-vant types of AST nodes can be dis-cov-ered: \T1/LinuxLibertin eMonoT-TLF/regular/n/10 AST_ASSIGN_LE Underfull \hbox (badness 10000) in paragraph at lines 702--705 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 705--710 []\T1/LinuxLibertineT-TLF/m/n/10 A new [][][][][] ob-ject is gen-er-ated, the s e-lec-tion ex-pres-sion is eval-u-ated Underfull \hbox (badness 10000) in paragraph at lines 705--710 \T1/LinuxLibertineT-TLF/m/n/10 us-ing [][][][][][][][] (with the use of [][][] and Underfull \hbox (badness 1231) in paragraph at lines 705--710 [][][]\T1/LinuxLibertineT-TLF/m/n/10 ) and added to the [][][][][] ob-ject and the ob-ject is added Underfull \hbox (badness 1226) in paragraph at lines 713--716 []\T1/LinuxLibertineT-TLF/m/n/10 New tem-po-rary sig-nals are gen-er-ated for a ll sig-nals in [][][] and stored in Underfull \hbox (badness 10000) in paragraph at lines 716--719 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals in [][][] are mapped us-ing [][][ ] and [71] Underfull \hbox (badness 10000) in paragraph at lines 724--728 []\T1/LinuxLibertineT-TLF/m/n/10 Set [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 731--734 []\T1/LinuxLibertineT-TLF/m/n/10 Append [][][] to [][][] and ap-pend Underfull \hbox (badness 3514) in paragraph at lines 739--742 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to t he new Underfull \hbox (badness 10000) in paragraph at lines 754--757 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 757--760 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals from [][][] are re-moved from the Underfull \hbox (badness 10000) in paragraph at lines 769--771 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to [72] Overfull \hbox (0.63689pt too wide) in paragraph at lines 789--796 \T1/LinuxLibertineT-TLF/m/n/10 calls to [][][][][][][][] with a [][][]/[][][]-t uple that Overfull \hbox (32.64174pt too wide) in paragraph at lines 799--802 \T1/LinuxLibertineT-TLF/m/n/10 The Pro-cess-Gen-er-a-tor con-verts a be-haviour al model in AST rep-re-sen-ta-tion to a be-havioural model in [][][][][] [73]) [74] (./CHAPTER_Optimize.tex Chapter 8. [75] [76] Overfull \hbox (1.26599pt too wide) in paragraph at lines 129--132 \T1/LinuxLibertineT-TLF/m/n/10 This pass iden-ti-fies un-used sig-nals and cell s and re-moves them from the de-sign. It also cre-ates an \T1/LinuxLibertineMon oT-TLF/regular/n/10 \unused_bits Overfull \hbox (43.95105pt too wide) in paragraph at lines 190--196 \T1/LinuxLibertineT-TLF/m/n/10 at-tribute. The \T1/LinuxLibertineMonoT-TLF/regu lar/n/10 fsm_extract \T1/LinuxLibertineT-TLF/m/n/10 ex-tracts all FSMs marked u s-ing the \T1/LinuxLibertineMonoT-TLF/regular/n/10 \fsm_encoding \T1/LinuxLiber tineT-TLF/m/n/10 at-tribute (un-less \T1/LinuxLibertineMonoT-TLF/regular/n/10 \ fsm_encoding [77] Overfull \hbox (7.16573pt too wide) in paragraph at lines 201--203 []\T1/LinuxLibertineT-TLF/m/n/10 The al-go-rithms used for FSM de-tec-tion and ex-trac-tion are in-flu-enced by a more gen-eral re-ported tech-nique [[]]. Overfull \hbox (1.6189pt too wide) in paragraph at lines 220--224 []\T1/LinuxLibertineT-TLF/m/n/10 This heuris-tic has proven to work very well. It is pos-si-ble to over-write it by set-ting \T1/LinuxLibertineMonoT-TLF/regul ar/n/10 \fsm_encoding= "auto" [78] [79]) [80] (./CHAPTER_Techmap.tex Chapter 9. [81]) [82] (./CHAPTER_Auxlibs.tex Appendix A. ) [83] (./CHAPTER_Auxprogs.tex Appendix B. ) [84] Appendix C. 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\hbox (31.07037pt too wide) in paragraph at lines 422--423 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 426--427 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 427--428 [][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 428--429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 429--430 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 430--431 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 431--432 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 435--436 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 440--441 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 441--442 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 442--443 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 446--447 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 455--456 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 456--457 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 457--458 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 462--463 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [93] Overfull \hbox (49.07056pt too wide) in paragraph at lines 466--467 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 484--485 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 485--486 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 495--498 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] [94] Overfull \hbox (1.07007pt too wide) in paragraph at lines 543--544 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [95] Overfull \hbox (7.07013pt too wide) in paragraph at lines 588--589 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 589--590 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 620--622 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [96] Overfull \hbox (13.07019pt too wide) in paragraph at lines 679--680 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [97] Overfull \hbox (19.07025pt too wide) in paragraph at lines 680--681 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 681--682 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 682--683 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 683--684 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 698--699 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 704--705 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 705--707 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 708--709 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 716--717 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 727--728 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [98] [99] Overfull \hbox (13.07019pt too wide) in paragraph at lines 786--787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 793--794 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 802--803 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 829--830 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [100] Overfull \hbox (13.07019pt too wide) in paragraph at lines 867--868 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 870--871 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 880--881 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 889--891 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [101] Overfull \hbox (13.07019pt too wide) in paragraph at lines 893--894 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 934--935 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [102] Overfull \hbox (7.07013pt too wide) in paragraph at lines 962--963 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 963--964 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 964--965 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 970--971 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 979--980 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 980--981 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 981--982 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 982--983 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 983--984 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 984--985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 985--986 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 986--987 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [103] Overfull \hbox (7.07013pt too wide) in paragraph at lines 997--998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (4.31282pt too wide) in paragraph at lines 1011--1011 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_fixup -- in-sert nec-es-sary buf fer cells for CoolRunner- Overfull \hbox (7.92607pt too wide) in paragraph at lines 1019--1019 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_sop -- break $sop cells into AND TER-M/ORTERM cells Overfull \hbox (13.07019pt too wide) in paragraph at lines 1041--1042 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [104] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1046--1048 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1061--1062 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [105] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1141--1144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [106] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1161--1162 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1167--1168 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [107] [108] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1271--1272 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1282--1283 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 1284--1285 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][] Overfull \hbox (253.07263pt too wide) in paragraph at lines 1307--1308 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [109] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1316--1317 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 1317--1318 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [110] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1380--1381 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [111] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1453--1454 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1463--1464 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [112] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1474--1476 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1499--1500 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [113] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1553--1554 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1554--1555 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1563--1564 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [114] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1614--1615 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1615--1616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [115] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1656--1657 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1666--1667 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 1667--1668 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [116] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1703--1704 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1707--1708 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1711--1712 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1722--1723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [117] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1742--1743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1784--1786 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [118] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1797--1798 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1808--1809 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1820--1821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [119] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1868--1869 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1869--1870 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1870--1871 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1871--1872 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1872--1873 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1873--1875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1876--1877 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1877--1878 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1887--1888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1889--1890 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [120] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1906--1907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1923--1924 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1924--1925 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1928--1929 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1932--1934 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1946--1947 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [121] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1962--1963 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1966--1967 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1997--1998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [122] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2018--2019 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2020--2022 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [123] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2104--2105 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2117--2118 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2118--2119 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [124] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2139--2140 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [125] [126] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2270--2271 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2278--2279 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [127] Overfull \hbox (14.32883pt too wide) in paragraph at lines 2328--2328 []\T1/LinuxLibertineT-TLF/b/n/14.4 ice40_braminit -- iCE40: per-form SB_RAM40_4 K ini-tial-iza-tion from [128] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2342--2343 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2344--2346 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2347--2348 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2350--2351 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2352--2353 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2376--2377 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2377--2378 [][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2385--2386 [][][][][][][][][][][][][][][][][][][][][] [129] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2428--2429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [130] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2477--2478 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2482--2483 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2483--2485 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [131] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2501--2502 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2528--2529 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2532--2534 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2535--2536 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2547--2548 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [132] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2555--2556 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2575--2576 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 2582--2584 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2589--2590 [][][][][][][][][][][][][][][][][][][][][][][][][][] [133] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2608--2609 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2609--2610 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2612--2613 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2615--2616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2633--2634 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2641--2642 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2642--2643 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2645--2646 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2646--2648 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2648--2649 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [134] [135] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2718--2719 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2735--2736 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2736--2737 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2737--2738 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [136] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2780--2782 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2782--2783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2787--2788 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2788--2790 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2791--2792 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2800--2801 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2809--2810 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2812--2813 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [137] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2820--2821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2830--2833 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2844--2845 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2858--2860 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2867--2868 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [138] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2919--2920 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [139] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2925--2926 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2947--2948 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2952--2953 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [140] Overfull \hbox (61.07068pt too wide) in paragraph at lines 2995--2996 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3003--3004 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 3005--3006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 3011--3012 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3013--3014 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3028--3029 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [141] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3051--3052 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3052--3053 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 3056--3058 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3059--3061 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3066--3068 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3069--3070 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3070--3071 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3080--3081 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [142] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3102--3103 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3103--3104 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] [143] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3154--3155 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.21193pt too wide) in paragraph at lines 3160--3160 []\T1/LinuxLibertineT-TLF/b/n/14.4 opt_mem_priority -- re-move pri-or-ity re-la -tions be-tween write ports Overfull \hbox (1.07007pt too wide) in paragraph at lines 3165--3166 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3168--3169 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [144] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3201--3202 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [145] [146] [147] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3348--3349 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3349--3350 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3363--3364 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3367--3368 [][][][][][][][][][][][][][][][][][][][][][][][] [148] [149] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3466--3467 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3468--3469 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3469--3470 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [150] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3548--3549 [][][][][][][][][][][][][][][][][][][][][][][][][][] [151] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3556--3557 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 3557--3558 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3558--3559 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 3559--3560 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3569--3571 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3572--3573 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 3573--3574 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3577--3578 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 3578--3580 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 3581--3582 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 3582--3583 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 3583--3584 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 3584--3585 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3599--3601 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [152] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3611--3612 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 3615--3616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (67.07074pt too wide) in paragraph at lines 3616--3618 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 3619--3620 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3620--3621 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3632--3633 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 3655--3657 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 3660--3661 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [153] Overfull \hbox (13.07019pt too wide) in paragraph at lines 3661--3664 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3688--3689 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3689--3690 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [154] Overfull \hbox (13.07019pt too wide) in paragraph at lines 3761--3763 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [155] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3791--3793 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3813--3814 [][][][][][][][][][][][][][][][][][][][][][] [156] [157] [158] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3979--3980 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [159] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3997--3998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3999--4000 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4005--4006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4028--4029 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [160] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4053--4055 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4069--4071 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [161] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4100--4102 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4125--4126 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4126--4127 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4134--4136 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [162] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4194--4195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4195--4196 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4196--4197 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [163] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4207--4208 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4225--4226 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4234--4235 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4238--4239 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4246--4247 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [164] Overfull \hbox (25.07031pt too wide) in paragraph at lines 4262--4264 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4270--4271 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4287--4288 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4307--4308 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [165] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4308--4309 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4322--4323 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4326--4327 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [166] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4365--4367 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4377--4378 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (325.07336pt too wide) in paragraph at lines 4398--4400 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][] [167] [168] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4485--4486 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4487--4488 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4488--4489 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4503--4504 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4507--4509 [][][][][][][][][][][][][][][][][][][][][][][][][][] [169] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4529--4530 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 4539--4541 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [170] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4609--4610 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4610--4611 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4614--4615 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [171] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4636--4638 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4655--4656 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4664--4665 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4668--4669 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4680--4681 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4685--4686 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4686--4687 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [172] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4690--4691 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4691--4692 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4725--4726 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4728--4729 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [173] Overfull \hbox (19.07025pt too wide) in paragraph at lines 4741--4742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4742--4743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4743--4744 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4762--4764 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4765--4767 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4774--4775 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4775--4776 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4776--4777 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4786--4787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [174] Overfull \hbox (295.07306pt too wide) in paragraph at lines 4848--4849 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][] [175] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4856--4857 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\hbox (1.07007pt too wide) in paragraph at lines 5092--5093 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [180] Overfull \hbox (37.07043pt too wide) in paragraph at lines 5150--5151 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5164--5165 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5168--5169 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [181] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5217--5218 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [182] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5252--5253 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5260--5261 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [183] Overfull \hbox (319.0733pt too wide) in paragraph at lines 5317--5318 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lines 5510--5511 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (805.07825pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5521--5522 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][] [188] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5570--5571 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5574--5575 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [189] Overfull \hbox (169.07178pt too wide) in paragraph at lines 5621--5622 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] [190] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5668--5669 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5707--5708 [][][][][][][][][][][][][][][][][][][][][][][][][][] [191] Overfull \hbox (349.07361pt too wide) in paragraph at lines 5741--5742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (235.07245pt too wide) in paragraph at lines 5754--5755 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] [192] Overfull \hbox (1.07007pt too wide) in paragraph at lines 5807--5808 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [193] [194] Overfull \hbox (205.07214pt too wide) in paragraph at lines 5881--5883 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][] Overfull \hbox (361.07373pt too wide) in paragraph at lines 5885--5886 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (115.07123pt too wide) in paragraph at lines 5910--5911 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [195] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5931--5932 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [196] Overfull \hbox (457.0747pt too wide) in paragraph at lines 5984--5985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6009--6010 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6016--6017 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6020--6021 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6024--6025 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [197] [198] Overfull \hbox (655.07672pt too wide) in paragraph at lines 6102--6103 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6122--6123 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (547.07562pt too wide) in paragraph at lines 6133--6134 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][] [199] Overfull \hbox (91.07098pt too wide) in paragraph at lines 6185--6186 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6186--6188 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6192--6193 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6194--6195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [200] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6198--6199 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6239--6240 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6240--6242 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [201] Overfull \hbox (19.07025pt too wide) in paragraph at lines 6261--6262 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (91.07098pt too wide) in paragraph at lines 6272--6274 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6298--6299 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 6299--6301 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6302--6304 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [202] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6308--6310 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 6338--6339 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [203] Overfull \hbox (397.0741pt too wide) in paragraph at lines 6363--6364 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][] Overfull \hbox (73.0708pt too wide) in paragraph at lines 6364--6365 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (109.07117pt too wide) in paragraph at lines 6374--6376 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [204] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6424--6425 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6428--6429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6432--6433 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [205] Overfull \hbox (487.07501pt too wide) in paragraph at lines 6473--6474 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][] Overfull \hbox (265.07275pt too wide) in paragraph at lines 6474--6475 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][] [206] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6520--6521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6524--6525 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [207] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6618--6619 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (163.07172pt too wide) in paragraph at lines 6623--6624 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] [208] Overfull \hbox (529.07544pt too wide) in paragraph at lines 6629--6630 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 6630--6631 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [209] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6678--6679 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6682--6683 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 6686--6687 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (67.07074pt too wide) in paragraph at lines 6692--6693 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6722--6723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] [210] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6733--6734 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6756--6758 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6782--6783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [211] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6786--6787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6790--6791 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6835--6836 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [212] Overfull \hbox (175.07184pt too wide) in paragraph at lines 6849--6850 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][] Overfull \hbox (247.07257pt too wide) in paragraph at lines 6850--6851 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paragraph at lines 7141--7143 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7143--7144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7150--7151 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7151--7152 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7157--7158 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [218] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7169--7170 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7170--7171 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7171--7172 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paragraph at lines 7194--7195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7195--7196 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 7196--7197 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7197--7198 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7200--7201 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7204--7205 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [219] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7213--7214 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 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paragraph at lines 7820--7821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [231] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7884--7885 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7885--7887 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7887--7888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7904--7905 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7905--7906 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7906--7908 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 7908--7909 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wide) in paragraph at lines 7963--7964 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7964--7965 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [233] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7976--7977 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 7986--7987 [][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7989--7990 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7991--7993 [][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8008--8009 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 8009--8010 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox 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[31] [32] [33] Overfull \hbox (8.12611pt too wide) in paragraph at lines 204--209 \T1/LinuxLibertineT-TLF/m/n/10 The RTLIL::Design ob-ject is ba-si-cally just a con-tainer for RTLIL::Module ob-jects. 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[41] [42] [43] Overfull \hbox (11.39877pt too wide) in paragraph at lines 306--311 []\T1/LinuxLibertineT-TLF/m/n/10 D-type flip-flops with en-able are rep-re-sent ed by \T1/LinuxLibertineMonoT-TLF/regular/n/10 $dffe\T1/LinuxLibertineT-TLF/m/n /10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $adffe\T1/LinuxLibertineT-TLF/m/ n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $aldffe\T1/LinuxLibertineT-TLF/ m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $dffsre\T1/LinuxLibertineT-TL F/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $sdffe\T1/LinuxLibertineT-T LF/m/n/10 , and \T1/LinuxLibertineMonoT-TLF/regular/n/10 $sdffce Overfull \hbox (4.45451pt too wide) in paragraph at lines 352--354 \T1/LinuxLibertineT-TLF/m/n/10 Memories are ei-ther rep-re-sented us-ing RTLIL: :Memory ob-jects, \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memrd_v2\T1/LinuxLi bertineT-TLF/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memwr_v2\T1/Lin uxLibertineT-TLF/m/n/10 , and \T1/LinuxLibertineMonoT-TLF/regular/n/10 $meminit _v2 [44] [45] Overfull \hbox (17.60497pt too wide) in paragraph at lines 473--479 []\T1/LinuxLibertineT-TLF/m/n/10 The HDL fron-tend mod-els a mem-ory us-ing RTL IL::Memory ob-jects and asyn-chronous \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memrd_v2 \T1/LinuxLibertineT-TLF/m/n/10 and \T1/LinuxLibertineMonoT-TLF/regula r/n/10 $memwr_v2 [46] Overfull \hbox (39.64764pt too wide) in paragraph at lines 513--516 \T1/LinuxLibertineT-TLF/m/n/10 This pa-ram-e-ter is \T1/LinuxLibertineMonoT-TLF /regular/n/10 \RD_PORTS*WR_PORTS \T1/LinuxLibertineT-TLF/m/n/10 bits wide, con- tain-ing a con-cate-na-tion of all \T1/LinuxLibertineMonoT-TLF/regular/n/10 \TR ANSPARENCY_MASK Overfull \hbox (33.24765pt too wide) in paragraph at lines 517--520 \T1/LinuxLibertineT-TLF/m/n/10 This pa-ram-e-ter is \T1/LinuxLibertineMonoT-TLF /regular/n/10 \RD_PORTS*WR_PORTS \T1/LinuxLibertineT-TLF/m/n/10 bits wide, con- tain-ing a con-cate-na-tion of all \T1/LinuxLibertineMonoT-TLF/regular/n/10 \CO LLISION_X_MASK [47] Overfull \hbox (14.04767pt too wide) in paragraph at lines 545--548 \T1/LinuxLibertineT-TLF/m/n/10 This pa-ram-e-ter is \T1/LinuxLibertineMonoT-TLF /regular/n/10 \WR_PORTS*WR_PORTS \T1/LinuxLibertineT-TLF/m/n/10 bits wide, con- tain-ing a con-cate-na-tion of all \T1/LinuxLibertineMonoT-TLF/regular/n/10 \PR IORITY_MASK Overfull \hbox (0.88203pt too wide) in paragraph at lines 584--589 []\T1/LinuxLibertineT-TLF/m/n/10 The \T1/LinuxLibertineMonoT-TLF/regular/n/10 m emory_collect \T1/LinuxLibertineT-TLF/m/n/10 pass can be used to con-vert dis-c rete \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memrd_v2\T1/LinuxLibertineT-TLF/ m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 $memwr_v2\T1/LinuxLibertineT- TLF/m/n/10 , and \T1/LinuxLibertineMonoT-TLF/regular/n/10 $meminit_v2 [48] Underfull \hbox (badness 1701) in paragraph at lines 605--607 []\T1/LinuxLibertineT-TLF/m/n/10 Add in-for-ma-tion about \T1/LinuxLibertineMon oT-TLF/regular/n/10 $assert\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertineM onoT-TLF/regular/n/10 $assume\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertin eMonoT-TLF/regular/n/10 $live\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertin eMonoT-TLF/regular/n/10 $fair\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertin eMonoT-TLF/regular/n/10 $cover\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLiberti neMonoT-TLF/regular/n/10 $equiv\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibert ineMonoT-TLF/regular/n/10 $initstate\T1/LinuxLibertineT-TLF/m/n/10 , [49] [50] [51] [52] [53]) [54] (./CHAPTER_Prog.tex Chapter 6. Overfull \hbox (13.798pt too wide) in paragraph at lines 12--13 \T1/LinuxLibertineT-TLF/m/n/10 The \T1/LinuxLibertineMonoT-TLF/regular/n/10 gui delines \T1/LinuxLibertineT-TLF/m/n/10 di-rec-tory con-tains notes on var-i-ous as-pects of Yosys de-vel-op-ment. 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[64] Underfull \hbox (badness 3009) in paragraph at lines 95--99 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Lexer is writ-ten us-ing the lexer gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 flex \T1/LinuxLibertineT-TLF/m/n/1 0 [[]]. Its source code can be found in Overfull \hbox (146.52289pt too wide) in paragraph at lines 117--119 \T1/LinuxLibertineT-TLF/m/n/10 The Ver-ilog Parser is writ-ten us-ing the parse r gen-er-a-tor \T1/LinuxLibertineT-TLF/m/it/10 bi-son \T1/LinuxLibertineT-TLF/m /n/10 [[]]. Its source code can be found in \T1/LinuxLibertineMonoT-TLF/regular /n/10 frontends/verilog/verilog_parser.y Overfull \hbox (4.14989pt too wide) in paragraph at lines 399--403 \T1/LinuxLibertineT-TLF/m/n/10 am-ple the mem-ber [][][][][][][] can hold a str ing value and is used e.g. in the \T1/LinuxLibertineMonoT-TLF/regular/n/10 AST_ IDENTIFIER Overfull \hbox (25.69577pt too wide) in paragraph at lines 403--408 \T1/LinuxLibertineT-TLF/m/n/10 Each [][][][][] is au-to-mat-i-cally an-no-tated with the cur-rent source code lo-ca-tion by the [][][][][] [65] [66] Overfull \hbox (11.2028pt too wide) in paragraph at lines 447--449 []\T1/LinuxLibertineT-TLF/m/n/10 Perform const fold-ing where it is nec-es-sary (e.g. in the value part of \T1/LinuxLibertineMonoT-TLF/regular/n/10 AST_PARAME TER\T1/LinuxLibertineT-TLF/m/n/10 , \T1/LinuxLibertineMonoT-TLF/regular/n/10 AS T_LOCALPARAM\T1/LinuxLibertineT-TLF/m/n/10 , [67] Overfull \hbox (17.49321pt too wide) in paragraph at lines 488--494 \T1/LinuxLibertineT-TLF/m/n/10 in-stance of [][][][][]. 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[70] Overfull \hbox (4.04175pt too wide) in paragraph at lines 656--659 []\T1/LinuxLibertineT-TLF/m/n/10 During this re-cur-sive eval-u-a-tion, three d if-fer-ent rel-e-vant types of AST nodes can be dis-cov-ered: \T1/LinuxLibertin eMonoT-TLF/regular/n/10 AST_ASSIGN_LE Underfull \hbox (badness 10000) in paragraph at lines 702--705 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 705--710 []\T1/LinuxLibertineT-TLF/m/n/10 A new [][][][][] ob-ject is gen-er-ated, the s e-lec-tion ex-pres-sion is eval-u-ated Underfull \hbox (badness 10000) in paragraph at lines 705--710 \T1/LinuxLibertineT-TLF/m/n/10 us-ing [][][][][][][][] (with the use of [][][] and Underfull \hbox (badness 1231) in paragraph at lines 705--710 [][][]\T1/LinuxLibertineT-TLF/m/n/10 ) and added to the [][][][][] ob-ject and the ob-ject is added Underfull \hbox (badness 1226) in paragraph at lines 713--716 []\T1/LinuxLibertineT-TLF/m/n/10 New tem-po-rary sig-nals are gen-er-ated for a ll sig-nals in [][][] and stored in Underfull \hbox (badness 10000) in paragraph at lines 716--719 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals in [][][] are mapped us-ing [][][ ] and [71] Underfull \hbox (badness 10000) in paragraph at lines 724--728 []\T1/LinuxLibertineT-TLF/m/n/10 Set [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 731--734 []\T1/LinuxLibertineT-TLF/m/n/10 Append [][][] to [][][] and ap-pend Underfull \hbox (badness 3514) in paragraph at lines 739--742 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to t he new Underfull \hbox (badness 10000) in paragraph at lines 754--757 []\T1/LinuxLibertineT-TLF/m/n/10 The val-ues of [][][], [][][], [][][] and Underfull \hbox (badness 10000) in paragraph at lines 757--760 []\T1/LinuxLibertineT-TLF/m/n/10 The sig-nals from [][][] are re-moved from the Underfull \hbox (badness 10000) in paragraph at lines 769--771 []\T1/LinuxLibertineT-TLF/m/n/10 Add an as-sign-ment from [][][] to [][][] to [72] Overfull \hbox (0.63689pt too wide) in paragraph at lines 789--796 \T1/LinuxLibertineT-TLF/m/n/10 calls to [][][][][][][][] with a [][][]/[][][]-t uple that Overfull \hbox (32.64174pt too wide) in paragraph at lines 799--802 \T1/LinuxLibertineT-TLF/m/n/10 The Pro-cess-Gen-er-a-tor con-verts a be-haviour al model in AST rep-re-sen-ta-tion to a be-havioural model in [][][][][] [73]) [74] (./CHAPTER_Optimize.tex Chapter 8. [75] [76] Overfull \hbox (1.26599pt too wide) in paragraph at lines 129--132 \T1/LinuxLibertineT-TLF/m/n/10 This pass iden-ti-fies un-used sig-nals and cell s and re-moves them from the de-sign. It also cre-ates an \T1/LinuxLibertineMon oT-TLF/regular/n/10 \unused_bits Overfull \hbox (43.95105pt too wide) in paragraph at lines 190--196 \T1/LinuxLibertineT-TLF/m/n/10 at-tribute. The \T1/LinuxLibertineMonoT-TLF/regu lar/n/10 fsm_extract \T1/LinuxLibertineT-TLF/m/n/10 ex-tracts all FSMs marked u s-ing the \T1/LinuxLibertineMonoT-TLF/regular/n/10 \fsm_encoding \T1/LinuxLiber tineT-TLF/m/n/10 at-tribute (un-less \T1/LinuxLibertineMonoT-TLF/regular/n/10 \ fsm_encoding [77] Overfull \hbox (7.16573pt too wide) in paragraph at lines 201--203 []\T1/LinuxLibertineT-TLF/m/n/10 The al-go-rithms used for FSM de-tec-tion and ex-trac-tion are in-flu-enced by a more gen-eral re-ported tech-nique [[]]. Overfull \hbox (1.6189pt too wide) in paragraph at lines 220--224 []\T1/LinuxLibertineT-TLF/m/n/10 This heuris-tic has proven to work very well. It is pos-si-ble to over-write it by set-ting \T1/LinuxLibertineMonoT-TLF/regul ar/n/10 \fsm_encoding= "auto" [78] [79]) [80] (./CHAPTER_Techmap.tex Chapter 9. [81]) [82] (./CHAPTER_Auxlibs.tex Appendix A. ) [83] (./CHAPTER_Auxprogs.tex Appendix B. ) [84] Appendix C. (./command-reference-manual.tex Overfull \hbox (13.07019pt too wide) in paragraph at lines 8--9 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (61.07068pt too wide) in paragraph at lines 12--13 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 13--15 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [85] Overfull \hbox (7.07013pt too wide) in paragraph at lines 73--74 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [86] Overfull \hbox (1.07007pt too wide) in paragraph at lines 111--112 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 116--117 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 128--129 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) 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paragraph at lines 983--984 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 984--985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 985--986 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 986--987 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [103] Overfull \hbox (7.07013pt too wide) in paragraph at lines 997--998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (4.31282pt too wide) in paragraph at lines 1011--1011 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_fixup -- in-sert nec-es-sary buf fer cells for CoolRunner- Overfull \hbox (7.92607pt too wide) in paragraph at lines 1019--1019 []\T1/LinuxLibertineT-TLF/b/n/14.4 coolrunner2_sop -- break $sop cells into AND TER-M/ORTERM cells Overfull \hbox (13.07019pt too wide) in paragraph at lines 1041--1042 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [104] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1046--1048 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1061--1062 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [105] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1141--1144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [106] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1161--1162 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1167--1168 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [107] [108] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1271--1272 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1282--1283 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 1284--1285 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][] Overfull \hbox (253.07263pt too wide) in paragraph at lines 1307--1308 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [109] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1316--1317 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 1317--1318 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [110] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1380--1381 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [111] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1453--1454 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1463--1464 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [112] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1474--1476 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1499--1500 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [113] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1553--1554 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1554--1555 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1563--1564 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [114] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1614--1615 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1615--1616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [115] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1656--1657 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1666--1667 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 1667--1668 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [116] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1703--1704 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1707--1708 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1711--1712 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1722--1723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [117] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1742--1743 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1784--1786 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [118] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1797--1798 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1808--1809 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1820--1821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [119] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1868--1869 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1869--1870 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1870--1871 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1871--1872 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1872--1873 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1873--1875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1876--1877 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1877--1878 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1887--1888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1889--1890 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [120] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1906--1907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1923--1924 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1924--1925 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1928--1929 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 1932--1934 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1946--1947 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [121] Overfull \hbox (13.07019pt too wide) in paragraph at lines 1962--1963 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 1966--1967 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 1997--1998 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [122] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2018--2019 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2020--2022 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [123] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2104--2105 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2117--2118 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2118--2119 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [124] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2139--2140 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [125] [126] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2270--2271 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2278--2279 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [127] Overfull \hbox (14.32883pt too wide) in paragraph at lines 2328--2328 []\T1/LinuxLibertineT-TLF/b/n/14.4 ice40_braminit -- iCE40: per-form SB_RAM40_4 K ini-tial-iza-tion from [128] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2342--2343 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2344--2346 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2347--2348 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2350--2351 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2352--2353 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2376--2377 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2377--2378 [][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2385--2386 [][][][][][][][][][][][][][][][][][][][][] [129] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2428--2429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [130] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2477--2478 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2482--2483 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2483--2485 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [131] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2501--2502 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2528--2529 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2532--2534 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2535--2536 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2547--2548 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [132] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2555--2556 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2575--2576 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 2582--2584 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2589--2590 [][][][][][][][][][][][][][][][][][][][][][][][][][] [133] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2608--2609 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2609--2610 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2612--2613 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2615--2616 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2633--2634 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2641--2642 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2642--2643 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2645--2646 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2646--2648 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2648--2649 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [134] [135] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2718--2719 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2735--2736 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 2736--2737 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2737--2738 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [136] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2780--2782 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 2782--2783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2787--2788 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2788--2790 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2791--2792 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2800--2801 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2809--2810 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2812--2813 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [137] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2820--2821 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2830--2833 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2844--2845 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2858--2860 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2867--2868 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [138] Overfull \hbox (1.07007pt too wide) in paragraph at lines 2919--2920 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [139] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2925--2926 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 2947--2948 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 2952--2953 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [140] Overfull \hbox (61.07068pt too wide) in paragraph at lines 2995--2996 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3003--3004 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 3005--3006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 3011--3012 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3013--3014 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3028--3029 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [141] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3051--3052 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3052--3053 [][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (55.07062pt too wide) in paragraph at lines 3056--3058 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 3059--3061 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3066--3068 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3069--3070 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3070--3071 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3080--3081 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [142] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3102--3103 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3103--3104 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] [143] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3154--3155 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.21193pt too wide) in paragraph at lines 3160--3160 []\T1/LinuxLibertineT-TLF/b/n/14.4 opt_mem_priority -- re-move pri-or-ity re-la -tions be-tween write ports Overfull \hbox (1.07007pt too wide) in paragraph at lines 3165--3166 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3168--3169 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [144] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3201--3202 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [145] [146] [147] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3348--3349 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3349--3350 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3363--3364 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3367--3368 [][][][][][][][][][][][][][][][][][][][][][][][] [148] [149] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3466--3467 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 3468--3469 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3469--3470 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [150] Overfull \hbox (1.07007pt too wide) in paragraph at lines 3548--3549 [][][][][][][][][][][][][][][][][][][][][][][][][][] [151] Overfull \hbox (31.07037pt too wide) in paragraph at lines 3556--3557 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at lines 3999--4000 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4005--4006 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 4028--4029 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [160] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4053--4055 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4069--4071 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [161] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4100--4102 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 4125--4126 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 4126--4127 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\hbox (1.07007pt too wide) in paragraph at lines 5092--5093 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [180] Overfull \hbox (37.07043pt too wide) in paragraph at lines 5150--5151 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5164--5165 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5168--5169 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [181] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5217--5218 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [182] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5252--5253 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5260--5261 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [183] Overfull \hbox (319.0733pt too wide) in paragraph at lines 5317--5318 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lines 5510--5511 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (805.07825pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 5520--5521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (43.0705pt too wide) in paragraph at lines 5521--5522 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][] [188] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5570--5571 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5574--5575 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [189] Overfull \hbox (169.07178pt too wide) in paragraph at lines 5621--5622 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][] [190] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5668--5669 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 5707--5708 [][][][][][][][][][][][][][][][][][][][][][][][][][] [191] Overfull \hbox (349.07361pt too wide) in paragraph at lines 5741--5742 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (235.07245pt too wide) in paragraph at lines 5754--5755 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] [192] Overfull \hbox (1.07007pt too wide) in paragraph at lines 5807--5808 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [193] [194] Overfull \hbox (205.07214pt too wide) in paragraph at lines 5881--5883 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][] Overfull \hbox (361.07373pt too wide) in paragraph at lines 5885--5886 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (115.07123pt too wide) in paragraph at lines 5910--5911 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [195] Overfull \hbox (7.07013pt too wide) in paragraph at lines 5931--5932 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [196] Overfull \hbox (457.0747pt too wide) in paragraph at lines 5984--5985 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6009--6010 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6016--6017 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6020--6021 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6024--6025 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [197] [198] Overfull \hbox (655.07672pt too wide) in paragraph at lines 6102--6103 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6122--6123 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (547.07562pt too wide) in paragraph at lines 6133--6134 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [][][] [199] Overfull \hbox (91.07098pt too wide) in paragraph at lines 6185--6186 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6186--6188 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6192--6193 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6194--6195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [200] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6198--6199 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6239--6240 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6240--6242 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [201] Overfull \hbox (19.07025pt too wide) in paragraph at lines 6261--6262 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[][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][] Overfull \hbox (73.0708pt too wide) in paragraph at lines 6364--6365 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (109.07117pt too wide) in paragraph at lines 6374--6376 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [204] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6424--6425 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6428--6429 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6432--6433 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [205] Overfull \hbox (487.07501pt too wide) in paragraph at lines 6473--6474 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][] Overfull \hbox (265.07275pt too wide) in paragraph at lines 6474--6475 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][] [206] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6520--6521 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6524--6525 [][][][][][][][][][][][][][][][][][][][][][][][][][][] [207] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6618--6619 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] Overfull \hbox (163.07172pt too wide) in paragraph at lines 6623--6624 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] [208] Overfull \hbox (529.07544pt too wide) in paragraph at lines 6629--6630 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 6630--6631 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] [209] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6678--6679 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6682--6683 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 6686--6687 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (67.07074pt too wide) in paragraph at lines 6692--6693 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (613.0763pt too wide) in paragraph at lines 6722--6723 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][] [210] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6733--6734 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6756--6758 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6782--6783 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [211] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6786--6787 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6790--6791 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (49.07056pt too wide) in paragraph at lines 6835--6836 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [212] Overfull \hbox (175.07184pt too wide) in paragraph at lines 6849--6850 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][] Overfull \hbox (247.07257pt too wide) in paragraph at lines 6850--6851 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6874--6875 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 6875--6876 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] [213] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6902--6903 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6906--6907 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (79.07086pt too wide) in paragraph at lines 6925--6927 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 6941--6942 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 6942--6943 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [214] [215] Overfull \hbox (151.0716pt too wide) in paragraph at lines 7029--7030 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][] Overfull \hbox (223.07233pt too wide) in paragraph at lines 7033--7034 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][][][][][][][][][][][][][][][][][][][] Overfull \hbox (85.07092pt too wide) in paragraph at lines 7038--7039 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ][] Overfull \hbox (121.07129pt too wide) in paragraph at lines 7044--7045 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (37.07043pt too wide) in paragraph at lines 7048--7049 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [216] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7083--7084 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [217] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7126--7127 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7130--7131 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7134--7135 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7135--7136 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7136--7137 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7137--7138 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 7140--7141 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7141--7143 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7143--7144 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7150--7151 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7151--7152 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7157--7158 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [218] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7169--7170 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7170--7171 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7171--7172 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paragraph at lines 7194--7195 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7195--7196 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (25.07031pt too wide) in paragraph at lines 7196--7197 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][ ] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7197--7198 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7200--7201 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7204--7205 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [219] Overfull \hbox (7.07013pt too wide) in paragraph at lines 7213--7214 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7214--7215 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7215--7217 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7218--7219 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 7219--7220 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7226--7227 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (19.07025pt too wide) in paragraph at lines 7227--7228 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 7228--7229 [][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (13.07019pt too wide) in paragraph at lines 7229--7230 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8848--8849 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8849--8850 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8858--8859 [][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8861--8862 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8862--8863 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8875--8876 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (31.07037pt too wide) in paragraph at lines 8877--8878 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] Overfull \hbox (7.07013pt too wide) in paragraph at lines 8879--8880 [][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][][] [250] Overfull \hbox (1.07007pt too wide) in paragraph at lines 8887--8888 [][][][][][][][][][][][][][][][][][][][][][][][][][][][] ) [251] (./CHAPTER_TextRtlil.tex Appendix D. [252] [253] [254] [255] [256]) [257] (./CHAPTER_Appnotes.tex Appendix E. [258] [259 <./APPNOTE_010_Verilog_to_BLIF.pdf>] [260 <./APPNOTE_010_Verilog_to_ BLIF.pdf>] [261 <./APPNOTE_010_Verilog_to_BLIF.pdf>] [262 <./APPNOTE_011_Design _Investigation.pdf>] [263 <./APPNOTE_011_Design_Investigation.pdf>] [264 <./APP NOTE_011_Design_Investigation.pdf>] [265 <./APPNOTE_011_Design_Investigation.pd f>] [266 <./APPNOTE_011_Design_Investigation.pdf>] [267 <./APPNOTE_011_Design_I nvestigation.pdf>] [268 <./APPNOTE_011_Design_Investigation.pdf>] [269 <./APPNO TE_011_Design_Investigation.pdf>] [270 <./APPNOTE_011_Design_Investigation.pdf> ] [271 <./APPNOTE_011_Design_Investigation.pdf>] [272 <./APPNOTE_012_Verilog_to _BTOR.pdf>] [273 <./APPNOTE_012_Verilog_to_BTOR.pdf>] [274 <./APPNOTE_012_Veril og_to_BTOR.pdf>] [275 <./APPNOTE_012_Verilog_to_BTOR.pdf>]) (./manual.bbl [276]) (./weblink.bbl [277] Underfull \hbox (badness 10000) in paragraph at lines 39--39 []\T1/LinuxLibertineT-TLF/m/n/10 Synopsys For-mal-ity Equiv-a-lence Check-ing. [][]$\T1/LinuxLibertineMonoT-TLF/regular/n/10 http : / / www . synopsys . com / Tools / ) [278] (./manual.aux (./CHAPTER_Intro.aux) (./CHAPTER_Basics.aux) (./CHAPTER_Approach.aux) (./CHAPTER_Overview.aux) (./CHAPTER_CellLib.aux) (./CHAPTER_Prog.aux) (./CHAPTER_Verilog.aux) (./CHAPTER_Optimize.aux) (./CHAPTER_Techmap.aux) (./CHAPTER_Auxlibs.aux) (./CHAPTER_Auxprogs.aux) (./CHAPTER_TextRtlil.aux) (./CHAPTER_Appnotes.aux)) LaTeX Warning: There were undefined references. ) (see the transcript file for additional information){/usr/share/texlive/texmf-d ist/fonts/enc/dvips/libertine/lbtn_ncsllp.enc}{/usr/share/texlive/texmf-dist/fo nts/enc/dvips/lm/lm-mathsy.enc}{/usr/share/texlive/texmf-dist/fonts/enc/dvips/l m/lm-mathit.enc}{/usr/share/texlive/texmf-dist/fonts/enc/dvips/lm/lm-rm.enc}{/u sr/share/texlive/texmf-dist/fonts/enc/dvips/libertine/lbtn_naooyc.enc}{/usr/sha re/texlive/texmf-dist/fonts/enc/dvips/libertine/lbtn_dhi6qf.enc}{/usr/share/tex live/texmf-dist/fonts/enc/dvips/libertine/lbtn_7grukw.enc}{/usr/share/texlive/t exmf-dist/fonts/enc/dvips/libertine/lbtn_76gpa5.enc}{/usr/share/texlive/texmf-d ist/fonts/enc/dvips/libertine/lbtn_nh77jq.enc}< /usr/share/texlive/texmf-dist/fonts/type1/public/lm/lmr9.pfb> Output written on manual.pdf (278 pages, 1916549 bytes). Transcript written on manual.log. + md5sum APPNOTE_010_Verilog_to_BLIF.aux APPNOTE_011_Design_Investigation.aux APPNOTE_012_Verilog_to_BTOR.aux CHAPTER_Appnotes.aux CHAPTER_Approach.aux CHAPTER_Auxlibs.aux CHAPTER_Auxprogs.aux CHAPTER_Basics.aux CHAPTER_CellLib.aux CHAPTER_Intro.aux CHAPTER_Optimize.aux CHAPTER_Overview.aux CHAPTER_Prog.aux CHAPTER_Techmap.aux CHAPTER_TextRtlil.aux CHAPTER_Verilog.aux PRESENTATION_ExAdv.aux PRESENTATION_ExOth.aux PRESENTATION_ExSyn.aux PRESENTATION_Intro.aux PRESENTATION_Prog.aux manual.aux presentation.aux weblink.aux manual.bbl weblink.bbl manual.blg weblink.blg + cmp autoloop.old autoloop.new + rm -f autoloop.old + rm -f autoloop.new ++ stat -c %y debian/man/yosys-smtbmc.txt ++ awk '{ print $1 }' + txt2man -d 2019-10-18 -t YOSYS-SMTBMC debian/man/yosys-smtbmc.txt gawk: cmd. line:58: warning: regexp escape sequence `\o' is not a known regexp operator gawk: cmd. line:116: warning: regexp escape sequence `\,' is not a known regexp operator gawk: cmd. line:116: warning: regexp escape sequence `\;' is not a known regexp operator + RPM_EC=0 ++ jobs -p + exit 0 Executing(%install): /bin/sh -e /var/tmp/rpm-tmp.qR6i2K + umask 022 + cd /builddir/build/BUILD + '[' /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64 '!=' / ']' + rm -rf /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64 ++ dirname /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64 + mkdir -p /builddir/build/BUILDROOT + mkdir /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64 + cd yosys-cdb57118758f855518ad416d12728d72bff58c10 + /usr/bin/make install DESTDIR=/builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64 'INSTALL=/usr/bin/install -p' PREFIX=/usr ABCEXTERNAL=/usr/bin/abc STRIP=/bin/true [Makefile.conf] CONFIG := gcc mkdir -p /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/bin cp yosys yosys-config yosys-filterlib yosys-smtbmc /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/bin /bin/true -S /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/bin/yosys /bin/true /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/bin/yosys-filterlib mkdir -p /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/yosys cp -r share/. /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/yosys/. + install -d -m0755 /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/include + mv /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/yosys/include /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/include/yosys + install -d -m0755 /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/man/man1 + install -m 0644 yosys-smtbmc.1 debian/yosys.1 debian/yosys-config.1 debian/yosys-filterlib.1 /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/man/man1 + install -d -m0755 /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/doc/yosys + install -m 0644 manual/APPNOTE_010_Verilog_to_BLIF.pdf manual/APPNOTE_011_Design_Investigation.pdf manual/APPNOTE_012_Verilog_to_BTOR.pdf manual/manual.pdf manual/presentation.pdf /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/share/doc/yosys + /usr/bin/find-debuginfo -j5 --strict-build-id -m -i --build-id-seed 0.12-1.20211209gitcdb5711.fc35 --unique-debug-suffix -0.12-1.20211209gitcdb5711.fc35.aarch64 --unique-debug-src-base yosys-0.12-1.20211209gitcdb5711.fc35.aarch64 --run-dwz --dwz-low-mem-die-limit 10000000 --dwz-max-die-limit 50000000 -S debugsourcefiles.list /builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10 extracting debug info from /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/bin/yosys extracting debug info from /builddir/build/BUILDROOT/yosys-0.12-1.20211209gitcdb5711.fc35.aarch64/usr/bin/yosys-filterlib dwz: Too few files for multifile optimization original debug info size: 228952kB, size after compression: 188288kB /usr/bin/sepdebugcrcfix: Updated 2 CRC32s, 0 CRC32s did match. 11739 blocks + /usr/lib/rpm/check-buildroot + /usr/lib/rpm/redhat/brp-ldconfig + /usr/lib/rpm/brp-compress + /usr/lib/rpm/redhat/brp-strip-lto /usr/bin/strip + /usr/lib/rpm/brp-strip-static-archive /usr/bin/strip + /usr/lib/rpm/check-rpaths + /usr/lib/rpm/redhat/brp-mangle-shebangs mangling shebang in /usr/bin/yosys-config from /bin/bash to #!/usr/bin/bash + /usr/lib/rpm/redhat/brp-python-bytecompile '' 1 0 + /usr/lib/rpm/redhat/brp-python-hardlink Executing(%check): /bin/sh -e /var/tmp/rpm-tmp.kuyRDz + umask 022 + cd /builddir/build/BUILD + cd yosys-cdb57118758f855518ad416d12728d72bff58c10 + make test ABCEXTERNAL=/usr/bin/abc SEED=314159265359 [Makefile.conf] CONFIG := gcc cd tests/simple && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/simple' + gcc -Wall -o /builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/tools/cmp_tbdata /builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/tools/cmp_tbdata.c Test: arrays02 -> ok Test: asgn_binop -> ok Test: defvalue -> ok Test: local_loop_var -> ok Test: macro_arg_spaces -> ok Test: matching_end_labels -> ok Test: memwr_port_connection -> ok Test: unnamed_block_decl -> ok Test: aes_kexp128 -> ok Test: always01 -> ok Test: always02 -> ok Test: always03 -> ok Test: arraycells -> ok Test: arrays01 -> ok Test: attrib01_module -> ok Test: attrib02_port_decl -> ok Test: attrib03_parameter -> ok Test: attrib04_net_var -> ok Test: attrib06_operator_suffix -> ok Test: attrib08_mod_inst -> ok Test: attrib09_case -> ok Test: carryadd -> ok Test: case_expr_const -> ok Test: case_expr_non_const -> ok Test: case_large -> ok Test: const_branch_finish -> ok Test: const_fold_func -> ok Test: const_func_shadow -> ok Test: constmuldivmod -> ok Test: constpower -> ok Test: dff_different_styles -> ok Test: dff_init -> ok Test: dynslice -> ok Test: fiedler-cooley -> ok Test: forgen01 -> ok Test: forgen02 -> ok Test: forloops -> ok Test: fsm -> ok Test: func_block -> ok Test: func_recurse -> ok Test: func_width_scope -> ok Test: genblk_collide -> ok Test: genblk_dive -> ok Test: genblk_order -> ok Test: genblk_port_shadow -> ok Test: generate -> ok Test: graphtest -> ok Test: hierarchy -> ok Test: hierdefparam -> ok Test: i2c_master_tests -> ok Test: ifdef_1 -> ok Test: ifdef_2 -> ok Test: implicit_ports -> ok Test: localparam_attr -> ok Test: loop_prefix_case -> ok Test: loop_var_shadow -> ok Test: loops -> ok Test: macro_arg_surrounding_spaces -> ok Test: macros -> ok Test: mem2reg -> ok Test: mem2reg_bounds_tern -> ok Test: mem_arst -> ok Test: memory -> ok Test: module_scope -> ok Test: module_scope_case -> ok Test: multiplier -> ok Test: muxtree -> ok Test: named_genblk -> ok Test: nested_genblk_resolve -> ok Test: omsp_dbg_uart -> ok Test: operators -> ok Test: param_attr -> ok Test: paramods -> ok Test: partsel -> ok Test: process -> ok Test: realexpr -> ok Test: repwhile -> ok Test: retime -> ok Test: rotate -> ok Test: scopes -> ok Test: signed_full_slice -> ok Test: signedexpr -> ok Test: sincos -> ok Test: specify -> ok Test: string_format -> ok Test: subbytes -> ok Test: task_func -> ok Test: undef_eqx_nex -> ok Test: usb_phy_tests -> ok Test: values -> ok Test: verilog_primitives -> ok Test: vloghammer -> ok Test: wandwor -> ok Test: wreduce -> ok make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/simple' cd tests/simple_abc9 && bash run-test.sh "-S 314159265359" ls: cannot access '*.sv': No such file or directory make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/simple_abc9' Test: abc9 -> ok Test: aes_kexp128 -> ok Test: always01 -> ok Test: always02 -> ok Test: always03 -> ok Test: arraycells -> ok Test: arrays01 -> ok Test: attrib01_module -> ok Test: attrib02_port_decl -> ok Test: attrib03_parameter -> ok Test: attrib04_net_var -> ok Test: attrib06_operator_suffix -> ok Test: attrib08_mod_inst -> ok Test: attrib09_case -> ok Test: carryadd -> ok Test: case_expr_const -> ok Test: case_expr_non_const -> ok Test: case_large -> ok Test: const_branch_finish -> ok Test: const_fold_func -> ok Test: const_func_shadow -> ok Test: constmuldivmod -> ok Test: constpower -> ok Test: dff_different_styles -> ok Test: dff_init -> ok Test: dynslice -> ok Test: fiedler-cooley -> ok Test: forgen01 -> ok Test: forgen02 -> ok Test: forloops -> ok Test: fsm -> ok Test: func_block -> ok Test: func_recurse -> ok Test: func_width_scope -> ok Test: genblk_collide -> ok Test: genblk_dive -> ok Test: genblk_order -> ok Test: genblk_port_shadow -> ok Test: generate -> ok Test: graphtest -> ok Test: hierarchy -> ok Test: hierdefparam -> ok Test: i2c_master_tests -> ok Test: ifdef_1 -> ok Test: ifdef_2 -> ok Test: implicit_ports -> ok Test: localparam_attr -> ok Test: loop_prefix_case -> ok Test: loop_var_shadow -> ok Test: loops -> ok Test: macro_arg_surrounding_spaces -> ok Test: macros -> ok Test: mem2reg -> ok Test: mem2reg_bounds_tern -> ok Test: mem_arst -> ok Test: memory -> ok Test: module_scope -> ok Test: module_scope_case -> ok Test: multiplier -> ok Test: muxtree -> ok Test: named_genblk -> ok Test: nested_genblk_resolve -> ok Test: omsp_dbg_uart -> ok Test: operators -> ok Test: param_attr -> ok Test: paramods -> ok Test: partsel -> ok Test: process -> ok Test: realexpr -> ok Test: repwhile -> ok Test: retime -> ok Test: rotate -> ok Test: scopes -> ok Test: signed_full_slice -> ok Test: signedexpr -> ok Test: sincos -> ok Test: string_format -> ok Test: subbytes -> ok Test: task_func -> ok Test: undef_eqx_nex -> ok Test: usb_phy_tests -> ok Test: values -> ok Test: verilog_primitives -> ok Test: vloghammer -> ok Test: wandwor -> ok Test: wreduce -> ok Test: arrays02 -> ok Test: asgn_binop -> ok Test: defvalue -> ok Test: local_loop_var -> ok Test: macro_arg_spaces -> ok Test: matching_end_labels -> ok Test: memwr_port_connection -> ok Test: unnamed_block_decl -> ok make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/simple_abc9' cd tests/hana && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/hana' Test: test_intermout -> ok Test: test_parse2synthtrans -> ok Test: test_parser -> ok Test: test_simulation_always -> ok Test: test_simulation_and -> ok Test: test_simulation_buffer -> ok Test: test_simulation_decoder -> ok Test: test_simulation_inc -> ok Test: test_simulation_mux -> ok Test: test_simulation_nand -> ok Test: test_simulation_nor -> ok Test: test_simulation_or -> ok Test: test_simulation_seq -> ok Test: test_simulation_shifter -> ok Test: test_simulation_sop -> ok Test: test_simulation_techmap -> ok Test: test_simulation_techmap_tech -> ok Test: test_simulation_vlib -> ok Test: test_simulation_xnor -> ok Test: test_simulation_xor -> ok make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/hana' cd tests/asicworld && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/asicworld' Test: code_hdl_models_GrayCounter -> ok Test: code_hdl_models_arbiter -> ok Test: code_hdl_models_cam -> ok Test: code_hdl_models_clk_div -> ok Test: code_hdl_models_clk_div_45 -> ok Test: code_hdl_models_d_ff_gates -> ok Test: code_hdl_models_d_latch_gates -> ok Test: code_hdl_models_decoder_2to4_gates -> ok Test: code_hdl_models_decoder_using_assign -> ok Test: code_hdl_models_decoder_using_case -> ok Test: code_hdl_models_dff_async_reset -> ok Test: code_hdl_models_dff_sync_reset -> ok Test: code_hdl_models_encoder_4to2_gates -> ok Test: code_hdl_models_encoder_using_case -> ok Test: code_hdl_models_encoder_using_if -> ok Test: code_hdl_models_full_adder_gates -> ok Test: code_hdl_models_full_subtracter_gates -> ok Test: code_hdl_models_gray_counter -> ok Test: code_hdl_models_half_adder_gates -> ok Test: code_hdl_models_lfsr -> ok Test: code_hdl_models_lfsr_updown -> ok Test: code_hdl_models_mux_2to1_gates -> ok Test: code_hdl_models_mux_using_assign -> ok Test: code_hdl_models_mux_using_case -> ok Test: code_hdl_models_mux_using_if -> ok Test: code_hdl_models_one_hot_cnt -> ok Test: code_hdl_models_parallel_crc -> ok Test: code_hdl_models_parity_using_assign -> ok Test: code_hdl_models_parity_using_bitwise -> ok Test: code_hdl_models_parity_using_function -> ok Test: code_hdl_models_pri_encoder_using_assign -> ok Test: code_hdl_models_rom_using_case -> ok Test: code_hdl_models_serial_crc -> ok Test: code_hdl_models_tff_async_reset -> ok Test: code_hdl_models_tff_sync_reset -> ok Test: code_hdl_models_uart -> ok Test: code_hdl_models_up_counter -> ok Test: code_hdl_models_up_counter_load -> ok Test: code_hdl_models_up_down_counter -> ok Test: code_specman_switch_fabric -> ok Test: code_tidbits_asyn_reset -> ok Test: code_tidbits_blocking -> ok Test: code_tidbits_fsm_using_always -> ok Test: code_tidbits_fsm_using_function -> ok Test: code_tidbits_fsm_using_single_always -> ok Test: code_tidbits_nonblocking -> ok Test: code_tidbits_reg_combo_example -> ok Test: code_tidbits_reg_seq_example -> ok Test: code_tidbits_syn_reset -> ok Test: code_tidbits_wire_example -> ok Test: code_verilog_tutorial_addbit -> ok Test: code_verilog_tutorial_always_example -> ok Test: code_verilog_tutorial_bus_con -> ok Test: code_verilog_tutorial_comment -> ok Test: code_verilog_tutorial_counter -> ok Test: code_verilog_tutorial_d_ff -> ok Test: code_verilog_tutorial_decoder -> ok Test: code_verilog_tutorial_decoder_always -> ok Test: code_verilog_tutorial_escape_id -> ok Test: code_verilog_tutorial_explicit -> ok Test: code_verilog_tutorial_first_counter -> ok Test: code_verilog_tutorial_flip_flop -> ok Test: code_verilog_tutorial_fsm_full -> ok Test: code_verilog_tutorial_good_code -> ok Test: code_verilog_tutorial_if_else -> ok Test: code_verilog_tutorial_multiply -> ok Test: code_verilog_tutorial_mux_21 -> ok Test: code_verilog_tutorial_n_out_primitive -> ok Test: code_verilog_tutorial_parallel_if -> ok Test: code_verilog_tutorial_parity -> ok Test: code_verilog_tutorial_simple_function -> ok Test: code_verilog_tutorial_simple_if -> ok Test: code_verilog_tutorial_task_global -> ok Test: code_verilog_tutorial_tri_buf -> ok Test: code_verilog_tutorial_v2k_reg -> ok Test: code_verilog_tutorial_which_clock -> ok make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/asicworld' # +cd tests/realmath && bash run-test.sh "-S 314159265359" cd tests/share && bash run-test.sh "-S 314159265359" generating tests.. PRNG seed: 314159265359 running tests.. [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48][49][50][51][52][53][54][55][56][57][58][59][60][61][62][63][64][65][66][67][68][69][70][71][72][73][74][75][76][77][78][79][80][81][82][83][84][85][86][87][88][89][90][91][92][93][94][95][96][97][98][99] cd tests/opt_share && bash run-test.sh "-S 314159265359" generating tests.. PRNG seed: 314159265359 running tests.. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/opt_share' [0][1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47][48][49][50][51][52][53][54][55][56][57][58][59][60][61][62][63][64][65][66][67][68][69][70][71][72][73][74][75][76][77][78][79][80][81][82][83][84][85][86][87][88][89][90][91][92][93][94][95][96][97][98][99]make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/opt_share' cd tests/fsm && bash run-test.sh "-S 314159265359" generating tests.. PRNG seed: 314159265359 running tests.. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/fsm' [0]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[1]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[2]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[3]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[4]K[5]K[6]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! T[7]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[8]K[9]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[10]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[11]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[12]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[13]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[14]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[15]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[16]K[17]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[18]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[19]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[20]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[21]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[22]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[23]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[24]K[25]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[26]K[27]K[28]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[29]K[30]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[31]K[32]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[33]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[34]K[35]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[36]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[37]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[38]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[39]K[40]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[41]K[42]K[43]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[44]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[45]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! T[46]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[47]K[48]Warning: Regarding the user-specified fsm_encoding attribute on gate.state: Users of state reg look like FSM recoding might result in larger circuit. Doesn't look like a proper FSM. Possible simulation-synthesis mismatch! K[49]K make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/fsm' cd tests/techmap && bash run-test.sh make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/techmap' Passed abc9.ys Warning: wire '\Q' is assigned in a block at < ok Test: firrtl_938 -> ok Test: implicit_en -> ok Test: issue00335 -> ok Test: issue00710 -> ok Test: no_implicit_en -> ok Test: read_arst -> ok Test: read_two_mux -> ok Test: shared_ports -> ok Test: simple_sram_byte_en -> ok Test: trans_addr_enable -> ok Test: trans_sdp -> ok Test: trans_sp -> ok Test: wide_all -> ok Test: wide_read_async -> ok Test: wide_read_mixed -> ok Test: wide_read_sync -> ok Test: wide_read_trans -> ok Test: wide_thru_priority -> ok Test: wide_write -> ok make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/memories' Testing expectations for amber23_sram_byte_en.v .. ok. Testing expectations for implicit_en.v .. ok. Testing expectations for issue00335.v .. ok. Testing expectations for issue00710.v .. ok. Testing expectations for no_implicit_en.v .. ok. Testing expectations for read_arst.v .. ok. Testing expectations for read_two_mux.v .. ok. Testing expectations for shared_ports.v .. ok. Testing expectations for simple_sram_byte_en.v .. ok. Testing expectations for trans_addr_enable.v .. ok. Testing expectations for trans_sdp.v .. ok. Testing expectations for trans_sp.v .. ok. Testing expectations for wide_all.v .. ok. Testing expectations for wide_read_async.v .. ok. Testing expectations for wide_read_mixed.v .. ok. Testing expectations for wide_read_sync.v .. ok. Testing expectations for wide_read_trans.v .. ok. Testing expectations for wide_thru_priority.v .. ok. Testing expectations for wide_write.v .. ok. cd tests/bram && bash run-test.sh "-S 314159265359" generating tests.. PRNG seed: 314159265359 running tests.. make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/bram' Passed memory_bram test 00_01. Passed memory_bram test 00_02. Passed memory_bram test 00_03. Passed memory_bram test 00_04. Passed memory_bram test 01_00. Passed memory_bram test 01_02. Passed memory_bram test 01_03. Passed memory_bram test 01_04. Passed memory_bram test 02_00. Passed memory_bram test 02_01. Passed memory_bram test 02_03. Passed memory_bram test 02_04. Passed memory_bram test 03_00. Passed memory_bram test 03_01. Passed memory_bram test 03_02. Passed memory_bram test 03_04. Passed memory_bram test 04_00. Passed memory_bram test 04_01. Passed memory_bram test 04_02. Passed memory_bram test 04_03. make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/bram' cd tests/various && bash run-test.sh make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/various' Warning: Wire abc9_test027.$abc$87$o is used but has no driver. Passed abc9.ys Passed attrib05_port_conn.ys Passed attrib07_func_call.ys Passed autoname.ys Passed blackbox_wb.ys Passed bug1496.ys Passed bug1531.ys Passed bug1614.ys Passed bug1710.ys Warning: Yosys has only limited support for tri-state logic at the moment. (< ok Test: svinterface_at_top -> ok Test: load_and_derive ->ok cd tests/svtypes && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/svtypes' Passed enum_simple.ys Passed logic_rom.ys < ok Test ../../techlibs/anlogic/cells_sim.v -> ok Test ../../techlibs/coolrunner2/cells_sim.v -> ok Test ../../techlibs/ecp5/cells_sim.v -> ok Test ../../techlibs/efinix/cells_sim.v -> ok Test ../../techlibs/gatemate/cells_sim.v -> ok Test ../../techlibs/gowin/cells_sim.v -> ok Test ../../techlibs/greenpak4/cells_sim.v -> ok Test ../../techlibs/ice40/cells_sim.v -DICE40_HX ->../../techlibs/ice40/cells_sim.v:2203: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2203: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2205: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2205: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2207: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2207: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2209: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2209: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2211: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2211: warning: choosing typ expression. ok Test ../../techlibs/ice40/cells_sim.v -DICE40_LP ->../../techlibs/ice40/cells_sim.v:2267: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2267: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2269: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2269: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2271: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2271: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2273: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2273: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2275: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2275: warning: choosing typ expression. ok Test ../../techlibs/ice40/cells_sim.v -DICE40_U ->../../techlibs/ice40/cells_sim.v:2331: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2331: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2333: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2333: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2335: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2335: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2337: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2337: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2339: warning: choosing typ expression. ../../techlibs/ice40/cells_sim.v:2339: warning: choosing typ expression. ok Test ../../techlibs/intel/cyclone10lp/cells_sim.v -> ok Test ../../techlibs/intel/cycloneiv/cells_sim.v -> ok Test ../../techlibs/intel/cycloneive/cells_sim.v -> ok Test ../../techlibs/intel/max10/cells_sim.v -> ok Test ../../techlibs/intel_alm/cyclonev/cells_sim.v -> ok Test ../../techlibs/machxo2/cells_sim.v -> ok Test ../../techlibs/nexus/cells_sim.v -> ok Test ../../techlibs/quicklogic/cells_sim.v -> ok Test ../../techlibs/sf2/cells_sim.v -> ok Test ../../techlibs/xilinx/cells_sim.v -> ok Test ../../techlibs/common/simcells.v -> ok Test ../../techlibs/common/simlib.v -> ok cd tests/arch/ice40 && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/ice40' Passed add_sub.ys Passed adffs.ys Warning: Resizing cell port top.sc6.c0.CI from 32 bits to 1 bits. Warning: Resizing cell port top.sc6.l0.I3 from 32 bits to 1 bits. Warning: Resizing cell port top.sc6.lien.I0 from 32 bits to 1 bits. Warning: Resizing cell port top.sc6.lien.I1 from 32 bits to 1 bits. Warning: Wire top.\PIN_24 is used but has no driver. Warning: Wire top.\PIN_23 is used but has no driver. Warning: Wire top.\PIN_22 is used but has no driver. Warning: Wire top.\PIN_21 is used but has no driver. Warning: Wire top.\PIN_20 is used but has no driver. Passed bug1597.ys Passed bug1598.ys Passed bug1626.ys Passed bug1644.ys Passed bug2061.ys Passed counter.ys Passed dffs.ys Passed dpram.ys Passed fsm.ys Passed ice40_dsp.ys Passed ice40_opt.ys Passed ice40_wrapcarry.ys Passed latches.ys Passed logic.ys Passed macc.ys Passed memories.ys Passed mul.ys Passed mux.ys Warning: wire '\data' is assigned in a block at rom.v:10.5-10.15. Warning: wire '\data' is assigned in a block at rom.v:11.5-11.15. Warning: wire '\data' is assigned in a block at rom.v:12.5-12.15. Warning: wire '\data' is assigned in a block at rom.v:13.6-13.16. Warning: wire '\data' is assigned in a block at rom.v:14.6-14.16. Warning: wire '\data' is assigned in a block at rom.v:15.6-15.16. Warning: wire '\data' is assigned in a block at rom.v:16.11-16.21. Passed rom.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/ice40' cd tests/arch/xilinx && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/xilinx' Warning: Whitebox '$paramod\FDRE\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Warning: Whitebox 'FDSE' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Warning: Whitebox '$paramod\FDRE_1\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Warning: Whitebox '$paramod\FDSE_1\INIT=s32'00000000000000000000000000000001' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Passed abc9_dff.ys Warning: Shift register inference not yet supported for family xc3s. Passed add_sub.ys Passed adffs.ys Passed attributes_test.ys Passed blockram.ys Passed bug1460.ys Passed bug1462.ys Passed bug1480.ys Passed bug1598.ys Warning: Wire top.\t is used but has no driver. Warning: Wire top.\in is used but has no driver. Passed bug1605.ys Passed counter.ys Passed dffs.ys Passed dsp_abc9.ys Passed dsp_cascade.ys Passed dsp_fastfir.ys Passed dsp_simd.ys Warning: Shift register inference not yet supported for family xc3se. Passed fsm.ys Passed latches.ys Passed logic.ys Warning: Shift register inference not yet supported for family xc3s. Passed lutram.ys Passed macc.ys Passed mul.ys Warning: Replacing memory \M with list of registers. See mul_unsigned.v:25 Passed mul_unsigned.ys Passed mux.ys Warning: Shift register inference not yet supported for family xc3se. Passed mux_lut4.ys Passed nosrl.ys Passed opt_lut_ins.ys Passed pmgen_xilinx_srl.ys Passed shifter.ys Passed tribuf.ys Passed xilinx_dffopt.ys Passed xilinx_dsp.ys Passed xilinx_srl.ys Passed macc.sh Passed tribuf.sh make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/xilinx' cd tests/arch/ecp5 && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/ecp5' Passed add_sub.ys Passed adffs.ys Passed bug1459.ys Passed bug1598.ys Passed bug1630.ys Passed bug2409.ys Warning: Whitebox '$paramod\TRELLIS_FF\REGSET=t24'010100110100010101010100' with (* abc9_flop *) contains a $dff cell with non-zero initial state -- this is not supported for ABC9 sequential synthesis. Treating as a blackbox. Passed bug2731.ys Passed counter.ys Passed dffs.ys Passed dpram.ys Passed fsm.ys Passed latches.ys Passed latches_abc9.ys Passed logic.ys Passed lutram.ys Passed macc.ys Passed memories.ys Passed mul.ys Passed mux.ys Passed opt_lut_ins.ys Warning: wire '\data' is assigned in a block at rom.v:9.5-9.15. Warning: wire '\data' is assigned in a block at rom.v:10.5-10.15. Warning: wire '\data' is assigned in a block at rom.v:11.5-11.15. Warning: wire '\data' is assigned in a block at rom.v:12.6-12.16. Warning: wire '\data' is assigned in a block at rom.v:13.6-13.16. Warning: wire '\data' is assigned in a block at rom.v:14.6-14.16. Warning: wire '\data' is assigned in a block at rom.v:15.11-15.21. Passed rom.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/ecp5' cd tests/arch/machxo2 && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/machxo2' Passed add_sub.ys Passed dffs.ys Passed fsm.ys Passed logic.ys Passed mux.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/machxo2' cd tests/arch/efinix && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/efinix' Passed add_sub.ys Passed adffs.ys Passed counter.ys Passed dffs.ys Passed fsm.ys Passed latches.ys Passed logic.ys Passed lutram.ys Passed mux.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/efinix' cd tests/arch/anlogic && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/anlogic' Passed add_sub.ys Passed counter.ys Passed dffs.ys Passed fsm.ys Passed latches.ys Passed logic.ys Passed lutram.ys Passed mux.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/anlogic' cd tests/arch/gowin && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/gowin' Passed add_sub.ys Passed adffs.ys Passed counter.ys Passed dffs.ys Passed fsm.ys ERROR: FF myDFFP.$auto$ff.cc:262:slice$387 (type $_DFF_PP1_) cannot be legalized: unsupported initial value and async reset value combination Expected error pattern 'unsupported initial value and async reset value combination' found !!! Passed init-error.ys Passed init.ys Passed logic.ys Passed lutram.ys Passed mux.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/gowin' cd tests/arch/intel_alm && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/intel_alm' Passed add_sub.ys Passed adffs.ys Passed blockram.ys Passed counter.ys Passed dffs.ys Passed fsm.ys Passed logic.ys Passed lutram.ys Passed mul.ys Passed mux.ys Passed quartus_ice.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/intel_alm' cd tests/arch/nexus && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/nexus' Passed add_sub.ys Passed adffs.ys Passed blockram.ys Passed counter.ys Passed dffs.ys Passed fsm.ys Passed logic.ys Passed lutram.ys Passed mul.ys Passed mux.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/nexus' cd tests/arch/quicklogic && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/quicklogic' Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed add_sub.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed adffs.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed counter.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed dffs.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed fsm.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed latches.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed logic.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed mux.ys Warning: delay target has not been set via SDC or scratchpad; assuming 12 MHz clock. Warning: Complex async reset for dff `\Q'. Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/quicklogic' cd tests/arch/gatemate && bash run-test.sh "-S 314159265359" make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/gatemate' Passed add_sub.ys Passed adffs.ys Passed counter.ys Passed dffs.ys Passed fsm.ys Passed latches.ys Passed logic.ys Passed memory.ys Passed mul.ys Passed mux.ys Passed shifter.ys Passed tribuf.ys make[1]: Leaving directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/arch/gatemate' cd tests/rpc && bash run-test.sh Running exec.ys.. cd tests/memfile && bash run-test.sh Running from the parent directory with content1.dat Running from the parent directory with temp/content2.dat Running from the parent directory with memfile/temp/content2.dat Running from the same directory with content1.dat Running from the same directory with temp/content2.dat Running from a child directory with content1.dat Running from a child directory with temp/content2.dat Running from a child directory with content2.dat Checking a failure when zero length filename is provided memory.v:0: ERROR: Can not open file `` for \$readmemb. Execution failed, which is OK. Checking a failure when not existing filename is provided memory.v:0: ERROR: Can not open file `content3.dat` for \$readmemb. Execution failed, which is OK. cd tests/verilog && bash run-test.sh make[1]: Entering directory '/builddir/build/BUILD/yosys-cdb57118758f855518ad416d12728d72bff58c10/tests/verilog' <